BDW's SLM control register change to L3CNTLREG, offset is 0x7034.
b4327f3 BDW: enable SLM in BDW.
src/intel/intel_defines.h | 2 ++
src/intel/intel_gpgpu.c | 51 ++++++++++++++++++++++++++++-----------------
2 files changed, 34 insertions(+), 19 deletions(-)
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