AGESA vendorcode: Add ENABLE_MRC_CACHE option

Hardware / Coreboot - Kyösti Mälkki [gmail.com] - 5 October 2017 09:23 EDT

When selected, try to store and restore memory training results from/to SPI flash. This change only pulls in the required parts from vendorcode for the build.

Change-Id: I12880237be494c71e1d4836abd2d4b714ba87762

0e1ea27 AGESA vendorcode: Add ENABLE_MRC_CACHE option
src/cpu/amd/agesa/Kconfig | 8 ++++++++
src/vendorcode/amd/agesa/common/agesa-entry-cfg.h | 4 +++-
2 files changed, 11 insertions(+), 1 deletion(-)

Upstream: review.coreboot.org


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