The original code won't set power gating for disabled port correctly, due to it must be set before Lock
BUG=chrome-os-partner:28234 BRANCH=None TEST=build and boot on samus
verify bit 24, 26 is set in RCBA(0x3a84) for samus
472d0cb broadwell: fixed power gating enable for disabled sata port
src/soc/intel/broadwell/finalize.c | 3 +++
src/soc/intel/broadwell/lpc.c | 2 --
2 files changed, 3 insertions(+), 2 deletions(-)
Upstream: review.coreboot.org