cavium: Add CN81xx SoC and eval board support

Hardware / Coreboot - David Hendricks [fb.com] - 10 July 2018 07:01 EDT

This adds Cavium CN81xx SoC and SFF EVB files.

Code is based off of Cavium's Octeon-TX SDK: https://github.com/Cavium-Open-Source-Distributions/OCTEON-TX-SDK

BDK coreboot differences: bootblock:- Get rid of BDK header- Add Kconfig for link address- Move CAR setup code into assembly- Move unaligned memory access enable into assembly- Implement custom bootblock entry function- Add CLIB and CSIB blobs

romstage:- Use minimal DRAM init only

devicetree:- Convert FTD to static C file containing key value pairs

Tested on CN81xx:- Boots to payload- Tested with GNU/Linux 4.16.3- All hardware is usable (after applying additional commits)

Implemented in future commits:- Vboot integration- MMU suuport- L2 Cache handling- ATF from external repo- Devicetree patching- Extended DRAM testing- UART init

Not working:- Booting a payload- Booting upstream ATF

TODO:- Configuration straps

Change-Id: I47b4412d29203b45aee49bfa026c1d86ef7ce688

8cbd569f74 cavium: Add CN81xx SoC and eval board support
src/mainboard/cavium/Kconfig | 30 +
src/mainboard/cavium/Kconfig.name | 2 +
src/mainboard/cavium/cn8100_sff_evb/Kconfig | 68 ++
src/mainboard/cavium/cn8100_sff_evb/Kconfig.name | 2 +
src/mainboard/cavium/cn8100_sff_evb/Makefile.inc | 27 +
.../cavium/cn8100_sff_evb/bdk_devicetree.c | 125 ++++
src/mainboard/cavium/cn8100_sff_evb/board.fmd | 24 +
src/mainboard/cavium/cn8100_sff_evb/board_info.txt | 6 +
src/mainboard/cavium/cn8100_sff_evb/bootblock.c | 46 ++
.../cavium/cn8100_sff_evb/cn81xx-linux.dtsi | 496 +++++++++++++
.../cavium/cn8100_sff_evb/ddr4-common.dtsi | 802 +++++++++++++++++++++
src/mainboard/cavium/cn8100_sff_evb/devicetree.cb | 18 +
src/mainboard/cavium/cn8100_sff_evb/mainboard.c | 216 ++++++
src/mainboard/cavium/cn8100_sff_evb/memlayout.ld | 1 +
src/mainboard/cavium/cn8100_sff_evb/romstage.c | 45 ++
.../cavium/cn8100_sff_evb/sff8104-linux.dts | 282 ++++++++
src/soc/cavium/Kconfig | 2 +
src/soc/cavium/cn81xx/Kconfig | 27 +
src/soc/cavium/cn81xx/Makefile.inc | 70 ++
src/soc/cavium/cn81xx/bootblock.c | 50 ++
src/soc/cavium/cn81xx/bootblock_custom.S | 257 +++++++
src/soc/cavium/cn81xx/chip.h | 22 +
src/soc/cavium/cn81xx/clock.c | 79 ++
src/soc/cavium/cn81xx/cpu.c | 26 +
src/soc/cavium/cn81xx/gpio.c | 193 +++++
src/soc/cavium/cn81xx/include/soc/addressmap.h | 123 ++++
src/soc/cavium/cn81xx/include/soc/clock.h | 26 +
src/soc/cavium/cn81xx/include/soc/cpu.h | 22 +
src/soc/cavium/cn81xx/include/soc/gpio.h | 34 +
src/soc/cavium/cn81xx/include/soc/memlayout.ld | 41 ++
src/soc/cavium/cn81xx/include/soc/sdram.h | 25 +
src/soc/cavium/cn81xx/include/soc/soc.h | 43 ++
src/soc/cavium/cn81xx/include/soc/spi.h | 40 +
src/soc/cavium/cn81xx/include/soc/timer.h | 30 +
src/soc/cavium/cn81xx/include/soc/twsi.h | 23 +
src/soc/cavium/cn81xx/include/soc/uart.h | 25 +
src/soc/cavium/cn81xx/sdram.c | 94 +++
src/soc/cavium/cn81xx/soc.c | 65 ++
src/soc/cavium/cn81xx/spi.c | 401 +++++++++++
src/soc/cavium/cn81xx/timer.c | 226 ++++++
src/soc/cavium/cn81xx/twsi.c | 696 ++++++++++++++++++
src/soc/cavium/cn81xx/uart.c | 265 +++++++
src/soc/cavium/common/Kconfig | 12 +
src/soc/cavium/common/Makefile.inc | 58 ++
src/soc/cavium/common/bdk-coreboot.c | 130 ++++
src/soc/cavium/common/bl31_plat_params.c | 32 +
src/soc/cavium/common/bootblock.c | 68 ++
src/soc/cavium/common/cbmem.c | 26 +
.../cavium/common/include/soc/bl31_plat_params.h | 25 +
src/soc/cavium/common/include/soc/bootblock.h | 29 +
src/soc/cavium/common/include/soc/sysreg.h | 65 ++
src/soc/cavium/common/rom_clib_s_nbl1fw.bin.hex | 16 +
src/soc/cavium/common/rom_csib_s_nbl1fw.bin.hex | 16 +
src/vendorcode/cavium/include/bdk/bdk-coreboot.h | 173 +++++
src/vendorcode/cavium/include/bdk/bdk-minimal.h | 14 +-
55 files changed, 5750 insertions(+), 9 deletions(-)

Upstream: review.coreboot.org


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