The Primary to Sideband Bridge (P2SB) is the interface to Private Con-figuration Registers (PCR) including GPIO configuration. Of course, access is restricted to Intel partners and criminals, so the PCI device is hidden from the OS. Probably we only need to fetch the SBREG_BAR address and can hide the PCI device again after that.
99b02a1d7c inteltool: Support for nasty Primary to Sideband Bridge (P2SB)
util/inteltool/Makefile | 3 +-
util/inteltool/inteltool.c | 3 ++
util/inteltool/inteltool.h | 6 ++++
util/inteltool/pcr.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++
util/inteltool/pcr.h | 30 ++++++++++++++++
5 files changed, 131 insertions(+), 1 deletion(-)