inteltool: Support for nasty Primary to Sideband Bridge (P2SB)

Hardware / Coreboot - Nico Huber [secunet.com] - 15 January 2018 01:18 EST

The Primary to Sideband Bridge (P2SB) is the interface to Private Con-figuration Registers (PCR) including GPIO configuration. Of course, access is restricted to Intel partners and criminals, so the PCI device is hidden from the OS. Probably we only need to fetch the SBREG_BAR address and can hide the PCI device again after that.

Change-Id: Ic121a09f021708aab82ae4b9d76d6c3c6fb884fa

99b02a1d7c inteltool: Support for nasty Primary to Sideband Bridge (P2SB)
util/inteltool/Makefile | 3 +-
util/inteltool/inteltool.c | 3 ++
util/inteltool/inteltool.h | 6 ++++
util/inteltool/pcr.c | 90 ++++++++++++++++++++++++++++++++++++++++++++++
util/inteltool/pcr.h | 30 ++++++++++++++++
5 files changed, 131 insertions(+), 1 deletion(-)

Upstream: review.coreboot.org


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