Also, add pretty printing of Westmere's DMI registers (tested on my t410s by staring at non-zero output values :)
Apparently Nehalem does not have a MEMBAR? But there are some documented memory controller control registers in PCI configuration space... left out for now.
The PCIEXBAR is not documented publicly AFAICT, but there is a similar register on a device on bus 0xFF. phcoder might know more...
Change-Id: I5faadb6e4f701728f5290276c02809b4993bd86d
dbc6fcd inteltool: add initial support for Nehalem
util/inteltool/inteltool.c | 1 +
util/inteltool/inteltool.h | 1 +
util/inteltool/memory.c | 2 +-
util/inteltool/pcie.c | 52 +++++++++++++++++++++++++++++++++++++++++++-
4 files changed, 54 insertions(+), 2 deletions(-)
Upstream: review.coreboot.org