riscv: add CAR interface

Hardware / Coreboot - Xiang Wang [126.com] - 18 July 2018 18:56 EDT

Add an interface to support cache as ram. Initialize stack pointer for each hart.

Change-Id: Ic3920e01dd1a7f047a53de57250589000a111409

35da319b72 riscv: add CAR interface
src/arch/riscv/bootblock.S | 36 +++++++++++++++++++++---------------
1 file changed, 21 insertions(+), 15 deletions(-)

Upstream: review.coreboot.org


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