rk3288: add ddr driver

Hardware / Coreboot - Jinkun Hong [rock-chips.com] - 24 March 2015 09:25 UTC

Supports DDR3 and LPDDR3.Supports dual channel.ddr max freq is 533mhz. ddr timing config file in src\mainboard\google\veyron\sdram_inf Remove dpll init in rk clk_init(), add rkclk_configure_ddr(unsigned int hz).

BUG=chrome-os-partner:29778 TEST=Build coreboot

Change-Id: I429eb0b8c365c6285fb6cfef008b41776cc9c2d9

c33ce35 rk3288: add ddr driver
src/mainboard/google/veyron/Makefile.inc | 1 +
src/mainboard/google/veyron/romstage.c | 2 +
src/mainboard/google/veyron/sdram_configs.c | 75 ++
.../veyron/sdram_inf/sdram-ddr3-hynix-2GB.inc | 77 ++
.../veyron/sdram_inf/sdram-lpddr3-samsung-2GB.inc | 78 ++
.../google/veyron/sdram_inf/sdram-unused.inc | 3 +
src/soc/rockchip/rk3288/Makefile.inc | 2 +-
src/soc/rockchip/rk3288/clock.c | 77 +-
src/soc/rockchip/rk3288/clock.h | 5 +-
src/soc/rockchip/rk3288/cpu.h | 2 +
src/soc/rockchip/rk3288/grf.h | 40 +-
src/soc/rockchip/rk3288/sdram.c | 1046 ++++++++++++++++++++
src/soc/rockchip/rk3288/sdram.h | 104 ++
13 files changed, 1498 insertions(+), 14 deletions(-)

Upstream: review.coreboot.org

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