sandy/ivy/nehalem: Remerge interrupt handling

Hardware / Coreboot - Vladimir Serbinenko [gmail.com] - 23 November 2014 10:30 UTC

On those chipsets the pins are just a legacy concept. Real interrupts are messages on corresponding busses or some internal logic of chipset. Hence interrupt routing isn't anymore board-specific (dependent on layout) but depends only on configuration. Rather than attempting to sync real config, ACPI and legacy descriptors, just use the same interrupt routing per chipset covering all possible devices.

The only part which remains board-specific are LPC and PCI interrupts.

Interrupt balancing may suffer from such merge but: a) Doesn't seem to be the case of this map on current systems b) Almost all OS use MSI nowadays bypassing this stuff completely c) If we want a good balancing we need to take into account that e.g. wlan card may be placed in a different slot and so would require complicated balancing on runtime. It's difficult to maintain with almost no benefit.

Change-Id: I9f63d1d338c5587ebac7a52093e5b924f6e5ca2d

33b535f sandy/ivy/nehalem: Remerge interrupt handling
.../google/butterfly/acpi/sandybridge_pci_irqs.asl | 64 --------------
src/mainboard/google/butterfly/acpi_tables.c | 18 ----
src/mainboard/google/butterfly/devicetree.cb | 9 --
src/mainboard/google/butterfly/romstage.c | 42 +---------
.../google/link/acpi/sandybridge_pci_irqs.asl | 68 ---------------
src/mainboard/google/link/acpi_tables.c | 18 ----
src/mainboard/google/link/devicetree.cb | 9 --
src/mainboard/google/link/romstage.c | 39 +--------
.../google/parrot/acpi/sandybridge_pci_irqs.asl | 68 ---------------
src/mainboard/google/parrot/acpi_tables.c | 18 ----
src/mainboard/google/parrot/devicetree.cb | 9 --
src/mainboard/google/parrot/romstage.c | 43 +---------
.../google/stout/acpi/sandybridge_pci_irqs.asl | 72 ----------------
src/mainboard/google/stout/acpi_tables.c | 18 ----
src/mainboard/google/stout/devicetree.cb | 9 --
src/mainboard/google/stout/romstage.c | 43 +---------
src/mainboard/intel/cougar_canyon2/devicetree.cb | 9 --
.../emeraldlake2/acpi/sandybridge_pci_irqs.asl | 68 ---------------
src/mainboard/intel/emeraldlake2/acpi_tables.c | 18 ----
src/mainboard/intel/emeraldlake2/devicetree.cb | 9 --
src/mainboard/intel/emeraldlake2/romstage.c | 38 +--------
.../kontron/ktqm77/acpi/sandybridge_pci_irqs.asl | 87 --------------------
src/mainboard/kontron/ktqm77/acpi_tables.c | 18 ----
src/mainboard/kontron/ktqm77/devicetree.cb | 9 --
src/mainboard/kontron/ktqm77/romstage.c | 58 +------------
.../lenovo/t520/acpi/sandybridge_pci_irqs.asl | 64 --------------
src/mainboard/lenovo/t520/acpi_tables.c | 18 ----
src/mainboard/lenovo/t520/devicetree.cb | 9 --
src/mainboard/lenovo/t520/romstage.c | 42 ----------
.../lenovo/t530/acpi/sandybridge_pci_irqs.asl | 64 --------------
src/mainboard/lenovo/t530/acpi_tables.c | 18 ----
src/mainboard/lenovo/t530/devicetree.cb | 9 --
src/mainboard/lenovo/t530/romstage.c | 42 ----------
.../lenovo/x201/acpi/nehalem_pci_irqs.asl | 86 -------------------
src/mainboard/lenovo/x201/acpi_tables.c | 36 --------
src/mainboard/lenovo/x201/devicetree.cb | 9 --
src/mainboard/lenovo/x201/romstage.c | 40 +--------
.../lenovo/x220/acpi/sandybridge_pci_irqs.asl | 64 --------------
src/mainboard/lenovo/x220/acpi_tables.c | 18 ----
src/mainboard/lenovo/x220/devicetree.cb | 9 --
src/mainboard/lenovo/x220/romstage.c | 42 ----------
.../lenovo/x230/acpi/sandybridge_pci_irqs.asl | 64 --------------
src/mainboard/lenovo/x230/acpi_tables.c | 18 ----
src/mainboard/lenovo/x230/devicetree.cb | 9 --
src/mainboard/lenovo/x230/romstage.c | 42 ----------
.../packardbell/ms2290/acpi/nehalem_pci_irqs.asl | 86 -------------------
src/mainboard/packardbell/ms2290/acpi_tables.c | 36 --------
src/mainboard/packardbell/ms2290/devicetree.cb | 9 --
src/mainboard/packardbell/ms2290/romstage.c | 41 ++-------
.../samsung/lumpy/acpi/sandybridge_pci_irqs.asl | 68 ---------------
src/mainboard/samsung/lumpy/acpi_tables.c | 18 ----
src/mainboard/samsung/lumpy/devicetree.cb | 9 --
src/mainboard/samsung/lumpy/romstage.c | 36 +-------
.../samsung/stumpy/acpi/sandybridge_pci_irqs.asl | 68 ---------------
src/mainboard/samsung/stumpy/acpi_tables.c | 18 ----
src/mainboard/samsung/stumpy/devicetree.cb | 9 --
src/mainboard/samsung/stumpy/romstage.c | 38 +--------
src/northbridge/intel/nehalem/acpi/hostbridge.asl | 3 -
.../intel/sandybridge/acpi/hostbridge.asl | 3 -
.../intel/sandybridge/romstage_native.c | 1 +
src/southbridge/intel/bd82x6x/Makefile.inc | 3 +
src/southbridge/intel/bd82x6x/acpi/irq.asl | 72 ++++++++++++++++
src/southbridge/intel/bd82x6x/acpi/pch.asl | 2 +
src/southbridge/intel/bd82x6x/chip.h | 13 ---
src/southbridge/intel/bd82x6x/early_rcba.c | 69 ++++++++++++++++
src/southbridge/intel/bd82x6x/lpc.c | 43 +++++-----
src/southbridge/intel/bd82x6x/madt.c | 45 ++++++++++
src/southbridge/intel/bd82x6x/pch.h | 1 +
src/southbridge/intel/ibexpeak/Makefile.inc | 2 +
src/southbridge/intel/ibexpeak/lpc.c | 43 +++++-----
src/southbridge/intel/ibexpeak/madt.c | 68 +++++++++++++++
src/southbridge/intel/ibexpeak/pch.h | 1 +
72 files changed, 319 insertions(+), 2050 deletions(-)

Upstream: review.coreboot.org

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