soc/ipq806x : Add CONFIG_TTB_BUFFER for the soc

Hardware / Coreboot - Deepa Dinamani [codeaurora.org] - 2 January 2015 22:00 UTC

Define a base address for page table entries. Place it 64KB below the bootblock loading address.

BUG=chrome-os-partner:28467 TEST=verified that the page tables are being populated at this address. Also observed that the SPI driver takes 900 ns to process a byte as opposed to 1.5 us in case caching is not enabled.

Original-Change-Id: I3d8bd3104c55389aa5768033642ebbf1fda0fec7

4d2d6ca soc/ipq806x : Add CONFIG_TTB_BUFFER for the soc.
src/soc/qualcomm/ipq806x/Kconfig | 4 ++++
1 file changed, 4 insertions(+)

Upstream: review.coreboot.org

Related Coreboot Activity

mb/google/guybrush/Kconfig.name: Alphabetize entries, add names
Matt DeVillier

mb/google/skyrim/Kconfig.name: Alphabetize entries, add names
Matt DeVillier

soc/amd/*/Kconfig: rework SPL options
Felix Held

Update amd_blobs submodule to upstream main branch
Matt DeVillier

Recent Coreboot Activity

vboot: Add catchall recovery reason for unspecified phase 4 errors
Julius Werner

mb/google/guybrush/Kconfig.name: Alphabetize entries, add names
Matt DeVillier

mb/google/skyrim/Kconfig.name: Alphabetize entries, add names
Matt DeVillier

soc/amd/*/Kconfig: rework SPL options
Felix Held

soc/intel/meteorlake: Add PsysPmax configuration
Jakub Czapiga

soc/ipq806x : Add CONFIG_TTB_BUFFER for the soc

Hardware / Coreboot - Deepa Dinamani [codeaurora.org] - 2 January 2015 22:00 UTC

Related Coreboot Activity

Share

Recent Coreboot Activity