vendorcode/amd/agesa: Do not hardcode ROM base address

Hardware / Coreboot - Alexandru Gagniuc [gmail.com] - 9 April 2014 14:54 UTC

The ROM address range is set up in the LPC PCI device, register 0x6c. Coreboot already sets that up correctly in the bootblock, however AGESA overrides that to 0xffffff00, which will always map the ROM from 0xff000000. This may conflict with other devices which are assigned address space in that range.

If a device is assigned a range between 0xff000000 and the real ROM base, accesses to that device will be diverted to the system ROM, regardless of how other BARs are set up. Since we already need to set up the ROM address range in the bootblock, before calling AGESA, just remove the override from AGESA.

Note that not all AGESA versions override this mapping.

Change-Id: I592e5d087ed830c9604a04a356912c7654ce56d2

6b583a4 vendorcode/amd/agesa: Do not hardcode ROM base address
.../amd/agesa/f12/Proc/Fch/Spi/LpcReset.c | 2 --
.../Spi/Family/Hudson2/Hudson2LpcResetService.c | 2 --
.../Spi/Family/Yangtze/YangtzeLpcResetService.c | 2 --
3 files changed, 6 deletions(-)

Upstream: review.coreboot.org

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