[AArch64] Commonise some SVE FP patterns

Programming / Compilers / GCC - rsandifo [138bc75d-0d04-0410-961f-82ee72b054a4] - 14 August 2019 08:21 EDT

This patch uses a single expander for generic FP binary optabs that map to predicated SVE instructions. This makes them consistent with the associated conditional optabs, which already work this way.

The patch also generalises the division handling to be one example of a register-only predicated FP operation. The ACLE patches will add FMULX to the same category.

2019-08-14 Richard Sandiford Kugan Vivekanandarajah

- config/aarch64/iterators.md (SVE_COND_FP_BINARY_REG): New int iterator. (sve_pred_fp_rhs1_operand, sve_pred_fp_rhs1_operand): New int attributes.
- config/aarch64/aarch64-sve.md (add3, sub3) (mul3, div3) (3): Merge into... (3): ...this new expander. (*div3): Generalize to... (*3): ...this.

6cbfe3da4c4 [AArch64] Commonise some SVE FP patterns
gcc/ChangeLog | 14 ++++
gcc/config/aarch64/aarch64-sve.md | 139 ++++++++++----------------------------
gcc/config/aarch64/iterators.md | 22 ++++++
3 files changed, 70 insertions(+), 105 deletions(-)

Upstream: gcc.gnu.org

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