[AArch64] Use SVE ADR to optimise shift-add sequences

Programming / Compilers / GCC - rsandifo [138bc75d-0d04-0410-961f-82ee72b054a4] - 14 August 2019 08:58 EDT

This patch uses SVE ADR to optimise shift-and-add and uxtw-and-add sequences.

2019-08-14 Richard Sandiford

gcc/
- config/aarch64/predicates.md (const_1_to_3_operand): New predicate.
- config/aarch64/aarch64-sve.md (*aarch64_adr_uxtw) (*aarch64_adr_shift, *aarch64_adr_shift_uxtw): New patterns.

gcc/testsuite/
- gcc.target/aarch64/sve/adr_1.c: New test.
- gcc.target/aarch64/sve/adr_1_run.c: Likewise.
- gcc.target/aarch64/sve/adr_2.c: Likewise.
- gcc.target/aarch64/sve/adr_2_run.c: Likewise.
- gcc.target/aarch64/sve/adr_3.c: Likewise.
- gcc.target/aarch64/sve/adr_3_run.c: Likewise.
- gcc.target/aarch64/sve/adr_4.c: Likewise.
- gcc.target/aarch64/sve/adr_4_run.c: Likewise.
- gcc.target/aarch64/sve/adr_5.c: Likewise.
- gcc.target/aarch64/sve/adr_5_run.c: Likewise.

de24aaf2795 [AArch64] Use SVE ADR to optimise shift-add sequences
gcc/ChangeLog | 6 +++
gcc/config/aarch64/aarch64-sve.md | 60 ++++++++++++++++++++++++
gcc/config/aarch64/predicates.md | 12 +++++
gcc/testsuite/ChangeLog | 13 +++++
gcc/testsuite/gcc.target/aarch64/sve/adr_1.c | 46 ++++++++++++++++++
gcc/testsuite/gcc.target/aarch64/sve/adr_1_run.c | 31 ++++++++++++
gcc/testsuite/gcc.target/aarch64/sve/adr_2.c | 21 +++++++++
gcc/testsuite/gcc.target/aarch64/sve/adr_2_run.c | 5 ++
gcc/testsuite/gcc.target/aarch64/sve/adr_3.c | 21 +++++++++
gcc/testsuite/gcc.target/aarch64/sve/adr_3_run.c | 5 ++
gcc/testsuite/gcc.target/aarch64/sve/adr_4.c | 9 ++++
gcc/testsuite/gcc.target/aarch64/sve/adr_4_run.c | 5 ++
gcc/testsuite/gcc.target/aarch64/sve/adr_5.c | 27 +++++++++++
gcc/testsuite/gcc.target/aarch64/sve/adr_5_run.c | 32 +++++++++++++
14 files changed, 293 insertions(+)

Upstream: gcc.gnu.org


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