RISC-V: Promode modes of constant loads for store insns

Programming / Compilers / GCC - wilson [138bc75d-0d04-0410-961f-82ee72b054a4] - 27 April 2019 00:46 EDT

This improves optimization of code storing constants to memory. Given this testcase:
void sub1 (int *a, long long *b) { *a = 1; *b = 1; } an unpatched rv64 compiler emits two li instructions, one for an SImode pseudo and one for a DImode pseudo. With the patch, we get a single DImode li insn.

gcc/
- config/riscv/riscv-protos.h (riscv_move_integer): Add machine_mode parameter.
- config/riscv/riscv.c (riscv_move_integer): New parameter orig_mode. Pass orig_mode to riscv_build_integer. (riscv_split_integer): Pass mode to riscv_move_integer. (riscv_legitimize_const_move): Likewise. (riscv_legitimize_move): For MEM dest and CONST_INT src case, new local promoted_mode. Replace force_reg call with code to load constant into promoted reg and then subreg it for the store.
- config/riscv/riscv.md (low+1): Pass mode to riscv_move_integer.

gcc/testsuite/
- gcc.target/riscv/load-immediate.c: New.

4479f584597 RISC-V: Promode modes of constant loads for store insns.
gcc/ChangeLog | 14 +++++++++
gcc/config/riscv/riscv-protos.h | 2 +-
gcc/config/riscv/riscv.c | 42 ++++++++++++++++++++-----
gcc/config/riscv/riscv.md | 3 +-
gcc/testsuite/ChangeLog | 4 +++
gcc/testsuite/gcc.target/riscv/load-immediate.c | 32 +++++++++++++++++++
6 files changed, 88 insertions(+), 9 deletions(-)

Upstream: gcc.gnu.org


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