And add fields uncovered by looking at the firmware. I think this covers all the memory, register, and scratch manipulation opcodes that exist on A6xx, plus one additional nice find for Vulkan and describing a previously unknown opcode and documenting CP_WAIT_REG_MEM.
Note that the bits for the CP_REG_TO_MEM count, as well as the formula for computing the actual count for both CP_REG_TO_MEM and CP_MEM_TO_REG, are changed because the A630 SQE firmware actually does something different. I haven't investigated older microcodes to see whether this extends back to A5xx and A4xx, but the only non-A6xx uses of this field result in the same bit-pattern when using the A6xx bit range and formula, so it should be safe to change the definition universally.
cfa1fb895ac a6xx: Add more CP packets
src/freedreno/registers/adreno_pm4.xml | 291 +++++++++++++++++++++++--
src/freedreno/vulkan/tu_cmd_buffer.c | 10 +-
src/gallium/drivers/freedreno/a4xx/fd4_query.c | 4 +-
src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 4 +-
src/gallium/drivers/freedreno/a6xx/fd6_emit.h | 2 +-
src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 10 +-
src/gallium/drivers/freedreno/a6xx/fd6_query.c | 4 +-
7 files changed, 294 insertions(+), 31 deletions(-)