anv: rework queries writes to ensure ordering memory writes

Graphics / Mesa 3D Graphics Library / Mesa - Lionel Landwerlin [intel.com] - 8 May 2019 09:49 EDT

We use a mix of MI & PIPE_CONTROL commands to write our queries' data (results & availability). Those commands' memory write order is not guaranteed with regard to their order in the command stream, unless CS stalls are inserted between them. This is problematic for 2 reasons :

1. We copy results from the device using MI commands even though the values are generated from PIPE_CONTROL, meaning we could copy unlanded values into the results and then copy the availability that is inconsistent with the values.

2. We allow the user to poll on the availability values of the query pool from the CPU. If the availability lands in memory before the values then we could return invalid values.

This change does 2 things to address this problem :

- We use either PIPE_CONTROL or MI commands to write both queries values and availability, so that the ordering of the memory writes guarantees that if availability is visible, results are also visible.

- For the occlusion & timestamp queries we apply a CS stall before copying the results on the device, to ensure copying with MI commands see the correct values of previous PIPE_CONTROL writes of availability (required by the Vulkan spec).

a07d06f1035 anv: rework queries writes to ensure ordering memory writes
src/intel/vulkan/genX_query.c | 101 +++++++++++++++++++++++++++++++++++-------
1 file changed, 84 insertions(+), 17 deletions(-)

Upstream: cgit.freedesktop.org


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