i965: Add support for control register

Graphics / Mesa 3D Graphics Library / Mesa - Jose Maria Casanova Crespo [igalia.com] - 6 December 2017 07:57 EST

Control register cr0 in i965 can be used to change the rounding modes in 32-bit to 16-bit floating-point conversions.

From intel Skylake PRM, vol 07, section "Register and Tegister Regions", subsection "Control Register" (page 754):

"Subregister cr0.0:ud contains normal operation control fields such as the floating-point mode ... "

Floating-point Rounding mode is changed at bits 5:4 of cr0.0:

"Rounding Mode. This field specifies the FPU rounding mode. It is initialized by Thread Dispatch." 00b = Round to Nearest or Even (RTNE) 01b = Round Up, toward +inf (RU) 10b = Round Down, toward -inf (RD) 11b = Round Toward Zero (RTZ)"

ac8d4734f6 i965: Add support for control register
src/intel/compiler/brw_reg.h | 6 ++++++
1 file changed, 6 insertions(+)

Upstream: cgit.freedesktop.org

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