This is all we need from the generator for SIMD8 vertex shaders. This opcode is just the send instruction, all the hard work will happen in the visitor using LOAD_PAYLOAD.
d9e29f5 i965: Add SIMD8 URB write low-level IR instruction
src/mesa/drivers/dri/i965/brw_defines.h | 3 +++
src/mesa/drivers/dri/i965/brw_fs.cpp | 4 ++++
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 25 +++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp | 16 ++++++++++++-
src/mesa/drivers/dri/i965/brw_shader.cpp | 3 +++
6 files changed, 51 insertions(+), 1 deletion(-)
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