i965: Add writes_accumulator flag

Graphics / Mesa 3D Graphics Library / Mesa - Juha-Pekka Heikkila [gmail.com] - 17 April 2014 00:46 UTC

Our hardware has an "accumulator" register, which can be used to store intermediate results across multiple instructions. Many instructions can implicitly write a value to the accumulator in addition to their normal destination register. This is enabled by the "AccWrEn" flag.

This patch introduces a new flag, inst->writes_accumulator, which allows us to express the AccWrEn notion in the IR. It also creates a n ALU2_ACC macro to easily define emitters for instructions that implicitly write the accumulator.

Previously, we only supported implicit accumulator writes from the ADDC, SUBB, and MACH instructions. We always enabled them on those instructions, and left them disabled for other instructions.

To take advantage of the MAC (multiply-accumulate) instruction, we need to be able to set AccWrEn on other types of instructions.

306ed81 i965: Add writes_accumulator flag
src/mesa/drivers/dri/i965/brw_fs.cpp | 17 +++-
.../dri/i965/brw_fs_dead_code_eliminate.cpp | 8 +-
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 7 +-
.../drivers/dri/i965/brw_schedule_instructions.cpp | 94 ++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_shader.h | 1 +
src/mesa/drivers/dri/i965/brw_vec4.cpp | 15 +---
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 7 +-
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 17 +++-
8 files changed, 131 insertions(+), 35 deletions(-)

Upstream: cgit.freedesktop.org

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