i965: Lower min/max after optimization on Gen4/5.

Graphics / Mesa 3D Graphics Library / Mesa - Matt Turner [gmail.com] - 17 February 2016 14:35 UTC

Gen4/5's SEL instruction cannot use conditional modifiers, so min/max are implemented as CMP + SEL. Handling that after optimization lets us CSE more.

On Ironlake:

total instructions in shared programs: 6426035 -> 6422753 (-0.05%) instructions in affected programs: 326604 -> 323322 (-1.00%) helped: 1411

total cycles in shared programs: 129184700 -> 129101586 (-0.06%) cycles in affected programs: 18950290 -> 18867176 (-0.44%) helped: 2419 HURT: 328

2f2c00c i965: Lower min/max after optimization on Gen4/5.
src/mesa/drivers/dri/i965/brw_fs.cpp | 37 +++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_builder.h | 10 ++-----
src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 20 +++----------
src/mesa/drivers/dri/i965/brw_vec4.cpp | 38 ++++++++++++++++++++++++
src/mesa/drivers/dri/i965/brw_vec4.h | 2 ++
src/mesa/drivers/dri/i965/brw_vec4_builder.h | 10 ++-----
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 14 ++-------
8 files changed, 88 insertions(+), 44 deletions(-)

Upstream: cgit.freedesktop.org

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