target-arm: Make *IS TLB maintenance ops affect all CPUs

Enterprise / Virtualization / QEMU - Peter Maydell [linaro.org] - 12 September 2014 08:06 UTC

The ARM architecture defines that the "IS" variants of TLB maintenance operations must affect all TLBs in the Inner Shareable domain, which for us means all CPUs. We were incorrectly implementing these to only affect the current CPU, which meant that SMP TCG operation was unstable.

fa439fc target-arm: Make *IS TLB maintenance ops affect all CPUs
target-arm/helper.c | 101 +++++++++++++++++++++++++++++++++++++++++++++------
1 file changed, 89 insertions(+), 12 deletions(-)

Upstream: git.qemu.org

  • Share