uxa: Implement minimal flushing for bdw+

Graphics / X.Org / xf86-video-intel - Chris Wilson [chris-wilson.co.uk] - 18 March 2014 11:52 UTC

Based on the patch by Kenneth Graunke, "Several places (such as intel_cache_expire) call intel_emit_batch_flush, so it needs to work on Broadwell. Sometimes the batch is empty, in which case current_batch may not yet be BLT_RING.

The PIPE_CONTROL code has not been ported to work on Broadwell, so trying to do a render ring flush will hang the GPU. It also doesn't make any sense to do a render ring flush, given that we never use the render ring for UXA on Broadwell."

Cc: Kenneth Graunke

15be6b7 uxa: Implement minimal flushing for bdw+
src/uxa/intel_batchbuffer.c | 17 ++++++++++++-----
1 file changed, 12 insertions(+), 5 deletions(-)

Upstream: cgit.freedesktop.org

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