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Beignet
Beignet is an open-source OpenCL implementation for Intel graphics cores on Linux.
Recent Activity
- add another broxton pciid 0x5A85
Guo Yejun - Runtime: re-enable cl_khr_gl_sharing with existing egl extension
Chuanbo Weng: In order to query low level layout of GL buffer object/texture/render buffer, previous implementation introduced an egl extension and implemented in Beignet side. - Runtime: Add CL base object for all cl objects
Junyan He: The runtime code is a little verbose in CL object handle. - KBL: add kabylake runtime support
Yang Rong: Kabylake is almost same as skylake, so use skylake functions directly. - KBL: add kabylake backend support
Yang Rong: Kabylake is almost same as skylake, derived it from GEN9. - KBL: add kabylake pciids
Yang Rong: V4: KBL is also GEN9. - Libocl: Add half type dot
Pan Xiuli: This is in OpenCL 1.0 and 1.1 spec, but missing in OpenCL 1.2 spec. - GetGenID: add the miss pci ids
Yang, Rong R: All pci ids supported in cl_device_data.h should list in this file. - Benchmark: Evaluate math performance on intervals
Grigore Lupescu: Functions to benchmark math functions on intervals.
Beignet Release Tags
- Runtime: add CL_DEVICE_SPIR_VERSIONS to clGetDeviceInfo
Yang Rong - Update Release 1.1.0 NEWS.mdwn
Yang Rong: ### diff --git a/docs/NEWS.mdwn b/docs/NEWS.mdwn index d0d208f..7aa8e94 100644 --- a/docs/NEWS.mdwn +++ b/docs/NEWS.mdwn @@ -1,5 +1,8 @@ # News +## Jul 21, 2015 +[Beignet 1.1.0](
Most Popular This Year
- GBE: Add llvm3.7 support
Yang Rong: Move all llvm relative includes to llvm_includes. - add basic function to dump Selection IR
Guo Yejun: Selection IR is a representation between Gen IR and Gen ASM, it is almost a Gen instruction but *before* the register allocation. only basic dump supported, not fully completed yet. - make Beignet as intermedia layer of CMRT
Guo Yejun: CMRT is C for Media Runtime on Intel GPU, see - add Broxton support
Guo Yejun: special versions of linux kernel and libdrm are needed. - add basic structure for selection IR optimization
Guo Yejun: The idea is that many optimzations can be done at selection IR level, which is nearly ISA-like *before* physical register allocation. - Backend: Add support for LLVM release 3.8
Pan Xiuli: This is support for llvm releae 3.8 - GBE: use opencl c to implement llvm.memset and llvm.memcpy
Yang Rong: llvm 3.7 change to llvm IR, need two copies if still use the llvm IR to implement llvm.memset and llvm.memcpy. - Backend: Establishing the thread/TID-EUID map
Junyan He: We need to use forward message to send data and sync threads within the same work group. - GBE: Add datalayout and triple to ll files
Yang Rong: It can fix datalayout mismatch warning in llvm3. - Backend: Add threadid as a curbe register
Junyan He: We need to build a map between logical workgroup thread and real hw thread.