This patch addresses an issue reported in <
When it comes to finding out if a piece of text fits the currently line or not, Word simply measures the text width and the line width, and decides if we fit or not.
> sc/source/core/tool/interpr3.cxx:3659:36: error: implicit conversion from 'unsigned long' to 'double' changes value from 18446744073709551615 to 18446744073709551616  > if (f < 1.0 || f > std::numeric_limits<SCSIZE>::max()) > ~ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
At splitting or joining list items or adding new ones, the removed or new list number or bullet didn't show the change, only a vertical line added to the left margin of the list items.
...which is reported now by Clang 10 trunk with -std=c++2a: > cui/source/tabpages/tpline.cxx:481:80: error: use of overloaded operator '==' is ambiguous (with operand types 'const XLineEndItem' and 'XLineStartItem') > if( pItem && ( !pOld || !( *static_cast<const XLineEndItem*>(pOld) == *pItem ) ) ) > ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^ ~~~~~~ > include/svx/xlnstit.hxx:43:29: note: candidate function (with reversed parameter order) > virtual bool operator==(const SfxPoolItem& rItem) const override; > ^ > include/svx/xlnedit.hxx:43:29: note: candidate function > virtual bool operator==(const SfxPoolItem& rItem) const override; > ^ But the base SfxPoolItem::operator == is virtual anyway, so no need to cast pOld to a derived type. And once the expression is changed to !( *pOld == *pItem ) loplugin:simplifybool would kick in, but only with old compilers.
with clang trunk
...(new with Clang 10 trunk), as seen during CppunitTest_sw_ooxmlexport:
There are three patterns here:
Reviewers: pvuorela, #calligra:_3.0
This patch extends r276951 to work for C++ too. 2019-10-22 Richard Sandiford gcc/cp/ - cp-tree.h (STF_USER_VISIBLE): New constant.
...(new with Clang 10 trunk), where adding even an offset of 0 to a null pointer is UB in C.
On Gen >= 10, Either src0 or src2 can use 16-bit immediate value, but not both.
see commit message of external/libstaroffice/0001-Fix-equality-operator-arguments.patch.1 for details
SwPageDesc is more or less just a named wrapper around one or more frame formats, and we know how to dump them already.
Importing this pass from fs_visitor::emit_alpha_to_coverage_workaround() in intel/compiler.
Use range-based loops, STL and comphelper functions.
0.49.0 can compile most of mesa with ICC or ICL, but not SWR without additional workarounds in our meson.build files.
...(new with Clang 10 trunk), as seen during CppunitTest_svx_unit:
- Reset default note range to 0..127 for step-entry and other users
Extend dg-extract-results.sh and dg-extract-results.py to support the KPASS test result status.
1cf7ab61a71d4b7295942ff5c855896e60c15081 "use -std=gnu++0x rather than-std=c++0x" appears to have started this, but the only rationale it gives is that it keeps things in sync with GCC's default behavior when no -std= is given.
- Update grid icons- Add missing Writer & Calc menubar icons
This information has never been useful.
- fix key-range off-by-one 0..127
This fixes an issue with scroll-wheel control which uses `get_active()`.
Shaves about 50% off the build time on both debian and arch builds.
Now that we have notion of byte masks, liveness tracking can be updated to reflect this extra granularity without loss of correctness.
We would like to eliminate not just entire dead instructions, but also dead components, which increases scheduler flexibility (since some vector instructions can become scalar after eliminating dead components).
A bunch of blend tests fixed on T760.
Strangely, while POSIX mentions the type for the mode argument when using the O_CREAT flag, it does not require <mqueue.h> to define it.
zmbv has only one function for decoding intra frames, namely decode_intra; and yet up until now it has been called via a function pointer.
Things started to go wrong when a2296128ccc1c678f0a8a591c36b5546683f482d "Some removal/replacement of the String/UniString with OUString" replaced
Patch series "mm/memory_hotplug: Shrink zones before removing memory", v6. This series fixes the access of uninitialized memmaps when shrinking zones/nodes and when removing memory.
Commit 1a61ab8038e72 ("mm: memcontrol: replace zone summing with lruvec_page_state()") has made lruvec_page_state to use per-cpu counters instead of calculating it directly from lru_zone_size with an idea that this would be more effective. Tim has reported that this is not really the case for their database benchmark which is showing an opposite results where lruvec_page_state is taking up a huge chunk of CPU cycles (about 25% of the system time which is roughly 7% of total cpu cycles) on 5.3 kernels.
Change-Id: If83b42066ffd928c9832e60ea05382ffc42fed84 Reviewed-on:
2019-10-17 JeanHeyd Meneide gcc/ - escaped_string.h (escaped_string): New header. - tree.c (escaped_string): Remove escaped_string class. gcc/c-family - c-lex.c (c_common_has_attribute): Update nodiscard value. gcc/cp/ - tree.c (handle_nodiscard_attribute) Added C++2a nodiscard string message.
This is more like how we handle s_lock.h and arch-x86.h.
This is like nir_texop_tex, but signals that the sampling coordinates are immutable during the shader stage, in a way that allows the HW that supports pre-dispatching sampling operations to pre-fetch the result prior to scheduling the shader stage. This is introduced to support the feature in Freedreno.
Add a placeholder instruction to track texture fetches made prior to FS shader dispatch.
Useful to see in disassembly listing texture fetches that were moved to pre-dispatch.
The pass should run once at the end of shader compilation, for a4xx onwards.
- allow gtk_pianokeyboard to respond to y-axis click position and include MIDI velocity with note-on signal
This is not merely cosmetic.
The used GDBusConnection should be configurable when creating the NMClient instance.
The majority of sources in "libnm/" are implementations of NMObject.
This is in preparation for changes in the dynamic linker so that pread() is used instead of lseek()+read().
This patch adds early splitting for addvdi4; it's very similar to the uaddvdi4 splitter, but the details are just different enough in places, especially for the patterns that match the splitting, where we have to compare against the non-widened version to detect if overflow occurred. I've also added a testcase to the testsuite for a couple of constants that caught me out during the development of this patch.
This code borrows strongly on the uaddvti4 expansion for aarch64 since the principles are similar.
Now that all the major patterns for DImode have been converted to early expansion, we can safely clean up some dead code for the old way of handling DImode. - config/arm/arm-modes.def (CC_NCV, CC_CZ): Delete CC modes. - config/arm/arm.c (arm_select_cc_mode): Remove old selection code for DImode operands.
In a small number of cases it is preferable to handle comparisons with constants using the sequence RSBS tmp, Xlo, constlo RSCS tmp, Xhi, consthi which allows us to handle a small number of LE/GT/LEU/GEU cases when changing the code to use LT/GE/LTU/GEU would make the constant more expensive.
This patch does most of the work for early splitting the DImode comparisons.
This patch adds a couple of alternative canonicalizations to allow combine to match a subtract-with-carry operation when one of the operands is shifted first.
When the carry flag is appropriately set by a comprison, negscc patterns can expand into a simple SBC of a register with itself.
Consider this sequence during combine: Trying 18, 7 -> 22: 18: r118:SI=r122:SI REG_DEAD r122:SI 7: r114:SI=0x1-r118:SI-ltu(cc:CC_RSB,0) REG_DEAD r118:SI REG_DEAD cc:CC_RSB 22: r1:SI=r114:SI REG_DEAD r114:SI Failed to match this instruction: (set (reg:SI 1 r1 [+4 ]) (minus:SI (geu:SI (reg:CC_RSB 100 cc) (const_int 0 )) (reg:SI 122))) Successfully matched this instruction: (set (reg:SI 114) (geu:SI (reg:CC_RSB 100 cc) (const_int 0 ))) Successfully matched this instruction: (set (reg:SI 1 r1 [+4 ]) (minus:SI (reg:SI 114) (reg:SI 122))) allowing combination of insns 18, 7 and 22 original costs 4 + 4 + 4 = 12 replacement costs 8 + 4 = 12 The costs are all correct, but we really don't want this combination to take place.
This patch adds early splitting of subdi3 so that the individual operations can be seen by the optimizers, particuarly combine.
The first step towards early splitting of addition and subtraction at DImode is to rip out the old patterns that are designed to propagate DImode through the RTL optimization passes and the do late splitting. This patch does cause some code size regressions, but it should still execute correctly.
### diff --git a/ANNOUNCE b/ANNOUNCE index 33d1b5744f..46582a9d25 100644 --- a/ANNOUNCE +++ b/ANNOUNCE @@ -1,18 +1,15 @@ -The Wine development release 4.17 is now available. +The Wine development release 4.18 is now available. What's new in this release (see below for details): - - New version of the Mono engine with upstream fixes. - - Support for DXTn compressed textures. - - Initial version of the Windows Script runtime library. - - Support for XRandR device change notifications. - - Support for generating RSA keys. - - Stubless proxies support on ARM64. + - Many new VBScript functions. + - A number of cleanups and improvements in Quartz. + - Fixes for several test failures. - Various bug fixes. The source is available from the following locations: -
Change-Id: Iadb74e757856545895444d66ec1be7a4f7a76a49 Reviewed-on:
It's just a matter of writing the addressing mode into the texture descriptor.
Create a separate implementation file with texture-descriptor-based sampler views and sampler states.
If softpin is available on the kernel side, we transparently replace the relocs with self-managed GPU virtual addresses.
Currently, the screen tracks all resources for all contexts, but this is not correct.
Have each context track which resources it marked as pending read and pending write.
A quick overview of the currently connected Wi-Fi network, including credentials.
These offsets can be useful to decode stack traces through modules that don't have symbol names.
The new IBM z15 is added to platform string array.
Apparently while this code was being developed, ReindexRelationConcurrently operated on multiple relations.
All nptl targets have these signal definitions nowadays.
Direct calls to back()->when or front()->when are not safe when the list is concurrently modified, or empty.
Makes it much easier to test it.
Just add the constructors for now and special case similar to END so we don't remove them.
These access memory used for passing data between geometry stages.
These intrinsics will let us do all the offset calculations in nir, which is nicer to work with and lets nir_opt_algebraic eat it all up.
Since the presence of GS changes how the VS operates we need to track that in the shader key.
This introduces two new lowering passes.
This implements the load_vs_primitive_stride_ir3, load_vs_vertex_stride_ir3 and load_primitive_location_ir3 intrinsics, used for getting the primitive layout strides and locations.
Inputs are the GS header, which contains vertex ID, local primitive ID and thread ID as well as primitive ID.
When we don't have streamout enabled, we have to read this register to get the number of primitives emitted.
and create conversion methods on *StringBuffer to make this work
LLVM 8 did remove both the signed and unsigned sse2/avx intrinsics in the end, and provide arch-independent llvm intrinsics instead.
Define std::identity, std::ranges::equal_to, std::ranges::not_equal_to, std::ranges::greater, std::ranges::less, std::ranges::greater_equal and std::ranges::less_equal.
ever since it was introduced in
i386.h has #define CLEAR_RATIO(speed) ((speed) ? MIN (6, ix86_cost->move_ratio) : 2) It is impossible to have CLEAR_RATIO > 6.
According to GAS, the Marvell PJ4 CPU has a VFPv3-D16 floating point unit, but GCC's CPU configuration tables omits this meaning that-mfpu=auto will not correctly select the FPU.
The code to create these "linked files" added by:
2019-10-17 Yuliang Wang gcc/ - config/aarch64/aarch64-sve2.md (aarch64_sve2_eor3<mode>) (aarch64_sve2_nor<mode>, aarch64_sve2_nand<mode>) (aarch64_sve2_bsl<mode>, aarch64_sve2_nbsl<mode>) (aarch64_sve2_bsl1n<mode>, aarch64_sve2_bsl2n<mode>): New combine patterns. - config/aarch64/iterators.md (BSL_DUP): New int iterator for the above.
Change-Id: I6c8f11e1e2b4192933541e754a078c4d0ff58206 Reviewed-on:
gcc/ChangeLog: 2019-10-17 Andre Vieira - tree-vect-loop.c (vect_transform_loop): Move code from here... - tree-vect-loop-manip.c (vect_loop_versioning): ...
notably the csv control is always LTR even in RTL mode, but the surrounding ScrollingWindow follows the environment direction, except the horizontal scrolling widget itself must LTR scroll.
This takes any color or backcolor that has unspecified shading and converts it to flat shading.
This allows the driver to request flatshade lowering.
This allows us to make sure clipdist is emitted as a scalar array rather than two vec4s.
Change-Id: I7752c281b1b6dd0d26bd7d6c4a6896c663f4cbc3 Reviewed-on:
Replace them with default initialization or calloc
Change-Id: Icc19b6e3493f1d9e49584c3e2ac99509fae4e02e Reviewed-on:
and reuse them for interpret'ing all cells under the respective threads.
Followup for LO 5.4 commit 6f2ad89b33d972f9642bb53eeb91f41df3b6b0e6 which set Calibri/11pt as default.