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- avfilter: Add blockdetect filter
- Linux Kernel: Linux 5.18
- drop old tiff filter
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- WINE: Release 7.9.
- sw content controls, picture: add insert UI
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- libpayload/pci: Add support for bus mapping
- Latest News (cont.)
- coreboot_tables: Add PCIe info to coreboot table
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- add utl::ByteReader pure class
- S390: Enable static PIE
- glibc: Remove kernel version check
- linux: Add udev dumps for wacom devices
- forcepoint#97 avoid Invalid read of size 2
- soc/intel: Add Raptor Lake device IDs
- soc/intel/common: Implement IOC driver
- arch/x86/postcar: Set up postcar MTRR in C code
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Coreboot
Coreboot, formerly known as LinuxBIOS, provides a modern BIOS/firmware implementation for many modern processors and chipsets.
Yesterday's Activity
- soc/intel/apollolake: Measure bootblock from IFWI
Werner Zeh: On Apollo Lake the bootblock is stitched into the IBBL IFWI region at build time. - mb/google/brask/variants/moli: add fw_config for usb retimer
Raihow Shi: add USBC0_RETIMER into 2, 3 bits for usb retimer. - soc/intel/cmn/fast-spi: Add BIOS MMIO window as reserved region
Werner Zeh: Add the boot flash MMIO window to the resources to report this region as reserved to the OS. - mb/google/brya/variants/nivviks: Add DPTF passive and critical policies for Nivviks
Vidya Gopalakrishnan: Add DPTF passive and critical policies for ADL-N Nivviks design. - mb/google/brya/var/volmar: Add wifi sar table
Ren Kuo - payloads/external: Add more option related to SeaBIOS and GRUB2
Bill XIE: Also known as "SeaGRUB", running GRUB2 atop SeaBIOS proves to be a useful configuration, since SeaBIOS has improved its hardware compatibility.
Other Activity This Week
- soc/intel/apollolake: Enable SSDT for fast SPI controller
Werner Zeh: Since the fast SPI controller is hidden on Apollo Lake the OS cannot probe it and is therefore unaware of the reserved resources assigned in coreboot. - mb/gogle/skyrim/devicetree: enable display HDA device
Felix Held: The HD audio controller of the GPU on bus A device 0 function 1 wasn't enabled, so it didn't get resources assigned. - mb/gogle/skyrim/devicetree: enable audio coprocessor device
Felix Held: The ACP device on bus A device 0 function 5 wasn't enabled, so it didn't get resources assigned. - mb/gogle/skyrim/devicetree: enable crypto device
Felix Held: The crypro device on bus A device 0 function 2 wasn't enabled, so it didn't get resources assigned resulting in this the Linux kernel error: - soc/intel/ehl: Provide function to change PHY-to-MAC IRQ polarity
Mario Scheithauer: EHL MAC side expects a rising edge signal for an IRQ. - src/soc/intel/cmn/fast-spi: Add SSDT extension to fast SPI driver
Werner Zeh: If the SPI controller is hidden from the OS (which is default on Apollo Lake) then OS has no chance to probe the device and therefore can not be aware of the resources this PCI device occupies. - mb/google/brya/acpi: Add support for NBCI _DSM subfunction
Tim Wawrzynczak: The Nvidia GPU supports another function named NBCI (NoteBook Common Interface), which has some subfunctions which are required for the Nvidia kernel driver to consume. - mb/google/brya: Add PEG and initial Nvidia dGPU ASL support
Tim Wawrzynczak: Some brya variants will use a GN20 series Nvidia GPU, which requires quite a bit of ACPI support code to be written for it. - mb/google/skyrim: Expose SKU and board ID to Chrome OS
Amanda Huang: Select EC_GOOGLE_CHROMEEC_SKUID and EC_GOOGLE_CHROMEEC_BOARDID to provide common routine for reading skudid and boardid from Chrome EC. - mb/google/skyrim/var/skyrim: Add better descriptors for USB endpoints
Jon Murphy: Fix descriptors for USB ports to align with their function and placement with respect to the schematics. - libpayload/pci: Add pci_map_bus function for MediaTek platform
Jianjun Wang: Add 'pci_map_bus' function and PCIE_MEDIATEK config for MediaTek platform. - libpayload/pci: Add support for bus mapping
Jianjun Wang: Move the common APIs to pci_ops.c and IO based operations to pci_io_ops.c, and add pci_map_bus_ops.c to support bus mapping. - coreboot_tables: Add PCIe info to coreboot table
Jianjun Wang: Add 'lb_fill_pcie' function to pass PCIe information from coreboot to libpayload, and add CB_ERR_NOT_IMPLEMENTED to the cb_err enum for the __weak function. ARM platform usually does not have common address for PCIe to access the configuration space of devices. - mb/google/nissa: Rework LTE GPIO configuration
Reka Norman: Currently, the LTE pins are enabled in gpio.c, then disabled in fw_config.c if LTE is not present. - soc/intel/common/block/smbus: Deduplicate some code
Angel Pons: Reuse existing SMBus code from southbridge/intel/common/smbus_ops.h.
Coreboot Release Tags
- util/genbuild_h: micro-adjust the regexp used to set COREBOOT_MAJOR_VERSION
Idwer Vollering: On FreeBSD, every build target would show warnings from its builtin printf(). - Revert "SeaBIOS: Update stable release to 1.15.0"
Paul Menzel: This reverts commit 2a8de6dafb7eec8ff9112b43888507fbc0d8f851. SeaBIOS 1.15.0 regresses on systems with NVMe devices [1]: > Greetings! Was this patch set tested on bare metal hardware? I'm > seeing "GRUB loading: Read Error" when attempting to boot from NVMe on > various Purism Librem devices (Intel Skylake thru Cometlake hardware). - crossgcc/buildgcc: Remove unused GCC_AUTOCONF_VERSION
Elyes HAOUAS: Clean up leftovers from commit d0f83723 and drop unused GCC_AUTOCONF_VERSION. - SeaBIOS: Update stable release to 1.15.0
Martin Roth: SeaBIOS 1.15.0 was released on December 2nd. - util/crossgcc/buildgcc: Use pre-set CROSSGCC_VERSION if possible
Felix Singer: For reproducibility, a version string is appended to the version of the tools used in the cross-toolchain. - soc/intel/jasperlake: Select DISPLAY_FSP_VERSION_INFO_2
Ronak Kanabar: Select DISPLAY_FSP_VERSION_INFO_2 for Jasper Lake soc. BUG=b:153038236 BRANCH=None TEST=Verify JSLRVP build with all the patch in relation chain and verify the version output prints no junk data observed. - util/docker: Rename _CONTAINER_VERSION => _IMAGE_TAG
Nico Huber: This is so confusing, let's name it what it is ;) - nb/intel/sandybridge: Bump MRC_CACHE_VERSION
Patrick Rudolph: Commit 74203de "intel/sandybridge: Don't hardcode platform type" changed the MRC layout. Bump the version to prevent a boot error, if the cache isn't cleared on flashing a new coreboot version. Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 - ifdtool: Add a list of known platforms that support IFD_VERSION_2
Furquan Shaikh: ifdtool has relied on one of the fields within FCBA(read_freq) to determine whether a platform supports IFD_VERSION_1 or IFD_VERSION_2. - vendorcode/intel: Add Kconfig option to get UDK_VERSION
Subrata Banik: This patch ensures if required SoC/FSP driver code can retrieve UDK version for a platform.
Most Popular In The Past Month
- Documentation: Add list of boards maintained on each branch
Martin Roth: This documents the boards that have been removed from the master branch, and which branch to check out to build or work on them. - commonlib: Add timestamp IDs for Chrome OS hypervisor
Mattias Nissler: Chrome OS is experimenting with a hypervisor layer that boots after firmware, but before the OS. - coreboot_tables: Add PCIe info to coreboot table
Jianjun Wang: Add 'lb_fill_pcie' function to pass PCIe information from coreboot to libpayload, and add CB_ERR_NOT_IMPLEMENTED to the cb_err enum for the __weak function. ARM platform usually does not have common address for PCIe to access the configuration space of devices. - cbfstool: MediaTek: Hash bootblock.bin for CBFS_VERIFICATION
Yu-Ping Wu: MediaTek's bootROM expects a SHA256 of the bootblock data at the end of bootblock.bin (see util/mtkheader/gen-bl-img.py). - Kconfig: Add an option to skip adding a cbfs bootblock on x86
Arthur Heymans: Some targets don't need this as the bootblock is loaded differently. - intelblocks: Add function to program GPE_EN before GPIO locking
Maulik V Vaghela: Since coreboot locks GPIO registers after GPIO configuration, OS is not able to program GPE_EN register to program wake events. - vendorcode/amd/cimx/sb900: Drop code
Arthur Heymans: No mainboard is using this code. - mb/google/deltaur: Remove mainboard from tree
Tim Wawrzynczak: This board never made it to production, and development on it has long since stopped; it is a maintenance burden, therefore drop it from the tree. - mb/google/brya: Add PEG and initial Nvidia dGPU ASL support
Tim Wawrzynczak: Some brya variants will use a GN20 series Nvidia GPU, which requires quite a bit of ACPI support code to be written for it. - util/inteltool: Add support for Gemini Lake
Sean Rhodes: Tested on: