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Coreboot

Coreboot, formerly known as LinuxBIOS, provides a modern BIOS/firmware implementation for many modern processors and chipsets.

www.coreboot.org

Yesterday's Activity

soc/intel/cannonlake: Enable common PMC code for CNL
Lijian Zhao: This update changes Cannonlake to use the new common PMC code.

mainboard/asrock: add ASRock B75 Pro3-M
Iru Cai: Tested:

ec/lenovo/h8: Add panic method
Patrick Rudolph: Add two additional LED IDs.

google/snappy: Add Raydium touch screen support
Kevin Chiu: Current coreboot does not create ACPI device for OS to recognize Raydium touchscreen.

google/snappy: Add MELFAS touch screen support
Kevin Chiu: Current coreboot does not create ACPI device for OS to recognize MELFAS touchscreen.

soc/intel/cannonlake: Add support for all UART port index
Subrata Banik: Select LPSS UART Base address based on LPSS UART port index.

soc/intel/skylake: Add support for all UART port index
Subrata Banik: Select LPSS UART Base address based on LPSS UART port index.

soc/intel/cannonlake: Add Kconfig option to select UART index
Subrata Banik: Cannonlake SOC has two possible ways to make serial console functional. 1.

soc/intel/skylake: Add Kconfig option to select UART index
Subrata Banik: Skylake/Kabylake SOC has two possible ways to make serial console functional. 1.

intel/common/cpu: Add function to get microcode patch pointer
Pratik Prajapati: Add mp_current_microcode() function to get the microcode patch pointer.

Other Activity This Week

nb/intel/x4x/raminit: Rework receive enable calibration
Arthur Heymans: Moves receive enable calibration to a separate file to lighten raminit.c a bit. Receive enable calibration is quite similar to gm45 so it reuses some of its function names. The functional changes are: - the minimum coarse is now reset for each channel; - on the second fine search for DQS high, TAP overflow is handled by increasing medium; - start coarse at CAS + 1 instead of CAS - 1.

mb/gigabyte/ga-b75m-d3v: add libgfxinit support
Bill XIE: On this device libgfxinit successfully initializes textmode and framebuffer mode on the device connected to the HDMI1 port.

i82801dx/gx/ix/jx: Add low-memory backup for S3 path
Kyösti Mälkki: SMM relocation code overwrite low memory owned by OS.

soc/intel/skylake: Enable power button SMI when jumping to payload
Furquan Shaikh: Instead of enabling power button SMI unconditionally, add a boot state handler to enable power button SMI just before jumping to payload.

mainboard/hp: Add HP Elitebook 8460p
Iru Cai: The code is based on autoport.

mainboard/hp: Add HP Elitebook 2570p
Iru Cai: The code is based on autoport.

mainboard/hp: Add HP Elitebook 8470p
Iru Cai: The code is based on the code generated by autoport. The EHCI debug port is between the DP port and eSATA port.

mainboard/hp: Add HP Elitebook 2760p
Iru Cai: The code is generated by autoport. The flash chip is socketed beside the WLAN slot.

payload/tianocore: Add patch to preserve coreboot table
Arthur Heymans: Credit for this patch goes to 'ReddestDream'.

soc/intel/cannonlake: Add SPI flash controller driver
Lijian Zhao: Add SPI driver code for the SPI flash controller, including both fast_spi and generic_spi.

intel/common/block/fast_spi: Add config option to disable write status
Duncan Laurie: Chrome OS systems rely on the write status register to enable/disable flash write protection and disabling this opcode breaks the ability to enable or disable write protection with flashrom. Add a configure option for this feature that will disable the opcode for Write Status commands unless CONFIG_CHROMEOS is enabled. Tested to ensure that a default build without CONFIG_CHROMEOS has this option enabled while a build with CONFIG_CHROMEOS does not.

arch/x86: Make postcar TempRamExit call generic
Marshall Dawson: Move the FSP-specific call for tearing down cache-as-RAM out of postcar.c and replace it with an empty weak function. This patch omits checking if (IS_ENABLED(CONFIG_FSP_CAR)).

mainboard/google/poppy: Add ACPI objects for NVMEM device GT24C16S and CAT24C16
V Sowmya: The Giantec semiconductor GT24C16S and ON semiconductor CAT24C16 are the industrial standard electrically erasable programmable read only memory (EEPROM's) and this patch adds ACPI objects and power resources for NVMEM device. Update DOVD method to set sensor IO LDO voltage and remove repetitive code from OVFI, VCMP and NVMP power resources. BUG=b:38326541 BRANCH=none TEST=Build and boot soraka.

soc/intel/cannonlake: Add proper support to enable UART2 in 16550 mode
Subrata Banik: Need to perform a dummy read in order to activate LPSS UART's 16550 8-bit compatibility mode.

soc/intel/skylake: Add proper support to enable UART2 in 16550 mode
Subrata Banik: Need to perform a dummy read in order to activate LPSS UART's 16550 8-bit compatibility mode.

AGESA: Cleanup ACPI S3 support
Kyösti Mälkki: Due to low-memory corruptions S3 support has now been (at least temporarily) removed from AGESA platfroms.

AGESA f14: Sacrifice ACPI S3 support for EARLY_CBMEM_INIT
Kyösti Mälkki: A decision has been made that boards with LATE_CBMEM_INIT will be dropped from coreboot master starting with next release scheduled for October 2017.

Coreboot Release Tags

SeaBIOS: remove VERSION variable in coreboot Makefile
Alexander Couzens: SeaBIOS dropped support of VERSION variable and is reproducible without it.

buildgcc: use ${GDB_DIR} instead of gdb-${GDB_VERSION}
Stefan Reinauer: Bring gdb in sync with all other build targets.

lenovo/*: Remove unused MAINBOARD_VERSION
Vladimir Serbinenko: Change-Id: I88e889efe43b32e7efc59ea40d13e79209a27264

Most Popular In The Past Month

AGESA: Introduce AGESA_LEGACY_WRAPPER and its counterpart
Kyösti Mälkki: We define AGESA_LEGACY_WRAPPER a method of calling AGESA via functions in agesawrapper.c file.

AGESA: Add romstage timestamps
Kyösti Mälkki: Experiments on f14 f15tn and 16kb suggest that TSC counter value shifts at end of raminit.

AGESA f15tn f16kb: Implement common FCH callout
Kyösti Mälkki: This FCH_OEM_CALLOUT bypasses API and uses structures that are private to AGESA.

libpayload: video: Add support for font scaling with a factor
Paul Kocialkowski: This introduces support for font scaling with a factor provided via Kconfig.

AGESA f15: Support DMI generation for Opteron 63XX family
Konstantin Aladyshev: Add support of DMI tables for AMD Opteron 6300 Series Processors.

usbdebug: Refactor early enable
Kyösti Mälkki: Always sanity check for EHCI class device and move PCI function power enablement up.

Documentation: Add binary extraction documentation
Logan Carlson: Added documentation on how to extract binaries from a ROM image, including:

depthcharge: Update stable commit id
Martin Roth: Update from commit eb583fa8 - Wed Mar 29, 2017 (rk3399_sdhci: Reintroduce PHY power-cycling at 52MHz)

rx6110sa: Make sure that VLF bit will be cleared
Werner Zeh: Ensure that the VLF bit will be cleared after a power loss event even if the stopwatch has expired before the code to clear the bit is reached.

AGESA: Cleanup ACPI S3 support
Kyösti Mälkki: Due to low-memory corruptions S3 support has now been (at least temporarily) removed from AGESA platfroms.

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