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- Latest News
- mb/google/octopus: Create ampton variant
- new loplugin:methodcycles
- mb/intel/coffeelake_rvp: Add whiskey lake rvp
- [aarch64] Add HiSilicon tsv110 CPU support
- Merge mktime, timegm from upstream Gnulib
- [morx] Implement forward/backward processing
- Add new pow implementation
- merge: branch 'lr/initrd'
- Latest News (cont.)
- initrd: add iBFT reader
- initrd: add command line parser
- initrd: add configuration generator
- merge: branch 'bg/n-acd-update'
- weston-info: add xdg-output support
- payloads/external: Add yabits payload
- avfilter: add acrossover filter
- WINE: Release 3.16.
- Fix race in chart::ChartView
- rampayload: Add the linuxcheck payload
- NetworkManager: build: remove check on dhclient version
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Coreboot
Coreboot, formerly known as LinuxBIOS, provides a modern BIOS/firmware implementation for many modern processors and chipsets.
Other Activity This Week
- mb/google/octopus: Create ampton variant
Justin TerAvest: This commit creates an ampton variant for Octopus. - mb/intel/coffeelake_rvp: Add whiskey lake rvp
Lijian Zhao: Add new mainboard variant of whiskey lake rvp, which is primary - mb/intel/coffeelake_rvp: GPIO support for whiskey board
Lijian Zhao: Add gpio programming difference for whiskeylake rvp platform. - mainboard/google/kahlee: allow oem.bin file to update smbios
Martin Roth: Grunt variants need a way to customize the mainboard vendor based on the platform. - src/vendorcode/amd/agesa: Improve formatting of some f12 and f14 microcodes
Mike Banon: It is much more convenient to view these files if there are 8 values per line, not 1 value which results in a very long file. - src/vendorcode/amd/agesa/f12: Update microcode to version 0x3000027 2011-09-13
Mike Banon: This microcode update for CPU ID 0x300F10 should improve the system stability. - soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources
Werner Zeh: FSP initializes the VT-d feature on Broadwell-DE and assigns an address space to the MMIO range. - mb/lenovo: Add libgfxinit support on Lenovo T520
Evgeny Zinoviev - google/buddy: Add board as variant of google/auron
Matt DeVillier: Add google/buddy (Acer Chromeboase 24) as a variant of google/auron, with the following changes: - soc/intel/broadwell: Add PCH_GPIO_PIRQ_INVERT definition
Matt DeVillier: Add definition for PCH_GPIO_PIRQ_INVERT, which is needed for google/buddy, a to-be-merged variant of google/auron.
Coreboot Release Tags
- nb/intel/sandybridge: Bump MRC_CACHE_VERSION
Patrick Rudolph: Commit 74203de "intel/sandybridge: Don't hardcode platform type" changed the MRC layout. Bump the version to prevent a boot error, if the cache isn't cleared on flashing a new coreboot version. Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 - ifdtool: Add a list of known platforms that support IFD_VERSION_2
Furquan Shaikh: ifdtool has relied on one of the fields within FCBA(read_freq) to determine whether a platform supports IFD_VERSION_1 or IFD_VERSION_2. - vendorcode/intel: Add Kconfig option to get UDK_VERSION
Subrata Banik: This patch ensures if required SoC/FSP driver code can retrieve UDK version for a platform. - soc/intel/cannonlake: Select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
Furquan Shaikh: BUG=b:70628116 - soc/intel/common/block/gspi: Add SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2
Furquan Shaikh: Even though kaby lake and cannon lake are using the same GSPI controller, bit meanings (for polarity and state) in SPI_CS_CONTROL register are significantly different. - SeaBIOS: remove VERSION variable in coreboot Makefile
Alexander Couzens: SeaBIOS dropped support of VERSION variable and is reproducible without it. - buildgcc: use ${GDB_DIR} instead of gdb-${GDB_VERSION}
Stefan Reinauer: Bring gdb in sync with all other build targets. - lenovo/*: Remove unused MAINBOARD_VERSION
Vladimir Serbinenko: Change-Id: I88e889efe43b32e7efc59ea40d13e79209a27264
Most Popular In The Past Month
- riscv: add entry assembly file for RAMSTAGE
Xiang Wang: RAMSTAGE will revoke CAR/scratchpad, so stack and exception handling needs to be moved to ddr memory. - Documentation: fix release version linking
Tom Hiller: Correct links to coreboot release notes and fix related "document isn't included in any toctree" warnings. - rampayload: Add the linuxcheck payload
Ronald G. Minnich: The i386.c file uses standard 3f8 UART for some simple diagnostic prints, and the libpayload console otherwise. - riscv: add spin lock support
Xiang Wang: Add spin lock support for riscv. - submodules: add FSP mirror as non-default submodule
Patrick Georgi: Like the 3rdparty/blobs repo this isn't checked out by default. - riscv: Add DEFINE_MPRV_READ_MXR to read execution-only page
Xiang Wang: Must to set MXR, when needs to read the page which is execution-only. - wedge100s: enable mrc cache in fmap
Okash Khawaja: this enables mrc cache in fmap for wedge100s and always enable it in Kconfig. - riscv: update misaligned memory access exception handling
Xiang Wang: Support for more situations: floating point, compressed instructions, etc. - riscv: add trampoline in MBR block to support boot mode 1
Philipp Hug: Add "j pc + 0x0800" at the beginning of the MBR to jump to bootblock. Tested on hardware: boot mode 15: works as before boot mode 1: jump to bootblock works, but bootblock needs to be modified to move the stack to L2LIM. - fsp_broadwell_de: enable spi console
Okash Khawaja: this enables spi console for wedge100s with broadwell_de.