AMD SPI: Optimise for longer writes

Hardware / Coreboot - Kyösti Mälkki [gmail.com] - 14 July 2014 12:43 UTC

Leave it to the implementation of flash->write() to split the writes to match SPI controller and SPI flash part restrictions. This allows for some optimisation for auto-address-increment (AAI) commands.

Kconfig AMD_SB_SPI_TX_LEN can be kept as local.

Change-Id: I4a8bc55ab7eb0eeda8f25003a8f5ff2a643ab7a7

9f0a2be AMD SPI: Optimise for longer writes
src/cpu/amd/agesa/spi.c | 7 +------
src/southbridge/amd/Kconfig | 9 ---------
src/southbridge/amd/agesa/hudson/spi.c | 15 +++++++++++++++
src/southbridge/amd/cimx/sb800/spi.c | 14 ++++++++++++++
4 files changed, 30 insertions(+), 15 deletions(-)

Upstream: review.coreboot.org

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