arch/riscv: Refactor bootblock.S

Hardware / Coreboot - Jonathan Neuschäfer [gmx.net] - 28 July 2016 11:31 UTC

A few things are currently missing:- The trap handler doesn't set the stack pointer, which can easily result in trap loops or memory corruptions.- The SBI trampolin page (as described in version 1.9 of the RISC-V Privileged Architecture Specification), has been removed for now.

Change-Id: Id89c859fab354501c94a0e82d349349c29fa4cc6

8e63017 arch/riscv: Refactor bootblock.S
src/arch/riscv/Makefile.inc | 3 +
src/arch/riscv/bootblock.S | 143 ++++++-------------------------------------
src/arch/riscv/id.S | 33 ++++++++++
3 files changed, 55 insertions(+), 124 deletions(-)

Upstream: review.coreboot.org

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arch/riscv: Refactor bootblock.S

Hardware / Coreboot - Jonathan Neuschäfer [gmx.net] - 28 July 2016 11:31 UTC

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