baytrail: add support for disabling south cluster pci devices

Hardware / Coreboot - Aaron Durbin [chromium.org] - 26 February 2014 23:12 UTC

When the southcluster pci devices are listed in the devicetree add the ability to perform the proper disabling sequence for turning off devices. This only turns off the pci device interface as well as put the device into D3Hot. It is not yet known how to put the TXE device into D3Hot so it's currently not possible to disable that device.

Also, expose the southcluster_enable_dev() function so that other devices can call this if they require doing specific things before disabling the device. The southcluster_enable_dev() is only called on devices found in the devicetree and if they currently have no ops associated with them.

BUG=chrome-os-partner:22871 BRANCH=None TEST=Built and booted through depthcharge. Interrogated output to ensure devices were being properly disabled.

Change-Id: I537ddcb9379907af2fe012948542b6150a8bf7c5

d7bc23a baytrail: add support for disabling south cluster pci devices
src/soc/intel/baytrail/baytrail/pci_devs.h | 4 +
src/soc/intel/baytrail/baytrail/pmc.h | 33 ++++
src/soc/intel/baytrail/baytrail/ramstage.h | 1 +
src/soc/intel/baytrail/chip.c | 8 +-
src/soc/intel/baytrail/southcluster.c | 268 +++++++++++++++++++++++++++-
5 files changed, 311 insertions(+), 3 deletions(-)

Upstream: review.coreboot.org

  • Share