Braswell: Use Baytrail as Comparison Base

Hardware / Coreboot - Lee Leahy [intel.com] - 22 May 2015 18:40 UTC

Add baytrail source for comparison with Braswell.

BRANCH=none BUG=None TEST=None

Change-Id: I5170addf41676d95a3daf070a32bcee085f8156d

77ff0b1 Braswell: Use Baytrail as Comparison Base
src/soc/intel/braswell/Kconfig | 245 +++++++
src/soc/intel/braswell/Makefile.inc | 107 ++++
src/soc/intel/braswell/acpi.c | 511 +++++++++++++++
src/soc/intel/braswell/acpi/cpu.asl | 77 +++
src/soc/intel/braswell/acpi/device_nvs.asl | 87 +++
src/soc/intel/braswell/acpi/dptf/charger.asl | 59 ++
src/soc/intel/braswell/acpi/dptf/cpu.asl | 144 +++++
src/soc/intel/braswell/acpi/dptf/dptf.asl | 78 +++
src/soc/intel/braswell/acpi/dptf/thermal.asl | 203 ++++++
src/soc/intel/braswell/acpi/globalnvs.asl | 108 ++++
src/soc/intel/braswell/acpi/gpio.asl | 110 ++++
src/soc/intel/braswell/acpi/irq_helper.h | 48 ++
src/soc/intel/braswell/acpi/irqlinks.asl | 492 ++++++++++++++
src/soc/intel/braswell/acpi/irqroute.asl | 37 ++
src/soc/intel/braswell/acpi/lpc.asl | 167 +++++
src/soc/intel/braswell/acpi/lpe.asl | 119 ++++
src/soc/intel/braswell/acpi/lpss.asl | 712 +++++++++++++++++++++
src/soc/intel/braswell/acpi/pcie.asl | 109 ++++
src/soc/intel/braswell/acpi/platform.asl | 78 +++
src/soc/intel/braswell/acpi/scc.asl | 187 ++++++
src/soc/intel/braswell/acpi/sleepstates.asl | 26 +
src/soc/intel/braswell/acpi/southcluster.asl | 274 ++++++++
src/soc/intel/braswell/acpi/xhci.asl | 36 ++
src/soc/intel/braswell/bootblock/Makefile.inc | 1 +
src/soc/intel/braswell/bootblock/bootblock.c | 79 +++
src/soc/intel/braswell/bootblock/timestamp.inc | 18 +
src/soc/intel/braswell/chip.c | 93 +++
src/soc/intel/braswell/chip.h | 95 +++
src/soc/intel/braswell/cpu.c | 309 +++++++++
src/soc/intel/braswell/dptf.c | 52 ++
src/soc/intel/braswell/ehci.c | 181 ++++++
src/soc/intel/braswell/elog.c | 122 ++++
src/soc/intel/braswell/emmc.c | 77 +++
src/soc/intel/braswell/gfx.c | 398 ++++++++++++
src/soc/intel/braswell/gpio.c | 245 +++++++
src/soc/intel/braswell/hda.c | 118 ++++
src/soc/intel/braswell/include/soc/acpi.h | 31 +
src/soc/intel/braswell/include/soc/device_nvs.h | 68 ++
src/soc/intel/braswell/include/soc/efi_wrapper.h | 52 ++
src/soc/intel/braswell/include/soc/ehci.h | 44 ++
src/soc/intel/braswell/include/soc/gfx.h | 64 ++
src/soc/intel/braswell/include/soc/gpio.h | 459 +++++++++++++
src/soc/intel/braswell/include/soc/iomap.h | 90 +++
src/soc/intel/braswell/include/soc/iosf.h | 349 ++++++++++
src/soc/intel/braswell/include/soc/irq.h | 164 +++++
src/soc/intel/braswell/include/soc/lpc.h | 54 ++
src/soc/intel/braswell/include/soc/mrc_wrapper.h | 107 ++++
src/soc/intel/braswell/include/soc/msr.h | 51 ++
src/soc/intel/braswell/include/soc/nvs.h | 78 +++
src/soc/intel/braswell/include/soc/pattrs.h | 64 ++
src/soc/intel/braswell/include/soc/pci_devs.h | 155 +++++
src/soc/intel/braswell/include/soc/pcie.h | 102 +++
src/soc/intel/braswell/include/soc/pmc.h | 303 +++++++++
src/soc/intel/braswell/include/soc/ramstage.h | 42 ++
src/soc/intel/braswell/include/soc/reset.h | 36 ++
src/soc/intel/braswell/include/soc/romstage.h | 54 ++
src/soc/intel/braswell/include/soc/sata.h | 26 +
src/soc/intel/braswell/include/soc/smm.h | 49 ++
src/soc/intel/braswell/include/soc/spi.h | 74 +++
src/soc/intel/braswell/include/soc/xhci.h | 56 ++
src/soc/intel/braswell/iosf.c | 287 +++++++++
src/soc/intel/braswell/lpe.c | 189 ++++++
src/soc/intel/braswell/lpss.c | 206 ++++++
src/soc/intel/braswell/memmap.c | 33 +
src/soc/intel/braswell/microcode/Makefile.inc | 1 +
src/soc/intel/braswell/microcode/microcode_blob.c | 3 +
src/soc/intel/braswell/northcluster.c | 148 +++++
src/soc/intel/braswell/pcie.c | 278 ++++++++
src/soc/intel/braswell/perf_power.c | 292 +++++++++
src/soc/intel/braswell/placeholders.c | 11 +
src/soc/intel/braswell/pmutil.c | 364 +++++++++++
src/soc/intel/braswell/ramstage.c | 206 ++++++
src/soc/intel/braswell/refcode.c | 148 +++++
src/soc/intel/braswell/reset.c | 47 ++
src/soc/intel/braswell/romstage/Makefile.inc | 7 +
src/soc/intel/braswell/romstage/cache_as_ram.inc | 285 +++++++++
src/soc/intel/braswell/romstage/early_spi.c | 65 ++
src/soc/intel/braswell/romstage/gfx.c | 50 ++
src/soc/intel/braswell/romstage/pmc.c | 81 +++
src/soc/intel/braswell/romstage/raminit.c | 191 ++++++
src/soc/intel/braswell/romstage/romstage.c | 377 +++++++++++
src/soc/intel/braswell/romstage/uart.c | 38 ++
src/soc/intel/braswell/sata.c | 240 +++++++
src/soc/intel/braswell/scc.c | 125 ++++
src/soc/intel/braswell/sd.c | 70 ++
src/soc/intel/braswell/smihandler.c | 483 ++++++++++++++
src/soc/intel/braswell/smm.c | 133 ++++
src/soc/intel/braswell/southcluster.c | 572 +++++++++++++++++
src/soc/intel/braswell/spi.c | 647 +++++++++++++++++++
src/soc/intel/braswell/stage_cache.c | 35 +
src/soc/intel/braswell/tsc_freq.c | 84 +++
src/soc/intel/braswell/xhci.c | 259 ++++++++
92 files changed, 14329 insertions(+)

Upstream: review.coreboot.org

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