broadcom/cygnus: Enable DDR auto self-refresh

Hardware / Coreboot - Icarus Chau [broadcom.com] - 22 April 2015 02:03 UTC

Enable auto entry and auto exit self-refresh. Configure entry idle time to 16x long count sequences. Where a long count sequence is 1024 cycles. The idle entry configuration is based on 32x of the DLL lock time (512 cycles). A conservative setting to help minimize self-refresh enter/exit thrashing.

BUG=chrome-os-partner:36456 BRANCH=broadcom-firmware TEST=When enable configuration CYGNUS_SDRAM_TEST_DDR, print on console:

sdram initialization is completed. test ddr start from 0x60000000 to 0x80000000

test ddr end: fail=0 Translation table is @ 02004000 Mapping address range [0x00000000:0x00000000) as uncached

Change-Id: Ibad220429fd52ead2933db03bec1a555f9385e53

be47636 broadcom/cygnus: Enable DDR auto self-refresh
src/soc/broadcom/cygnus/Kconfig | 8 +++
src/soc/broadcom/cygnus/ddr_init.c | 21 +++++++
src/soc/broadcom/cygnus/include/soc/config.h | 4 ++
.../broadcom/cygnus/include/soc/halapis/ddr_regs.h | 62 ++++++++++++++++++++
4 files changed, 95 insertions(+)

Upstream: review.coreboot.org

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