broadwell: Fixes for _SWS support

Hardware / Coreboot - Duncan Laurie [chromium.org] - 15 April 2015 14:46 UTC

- These should be 64bit values so when they try to return -1 it is interpreted properly by the kernel.- The GPE value needs to be reset at the start so it does not return stale data from a previous resume.- If a GPE register is zero the value should only be updated if it has not yet found a set bit.

BUG=chrome-os-partner:34532 BRANCH=samus,auron TEST=build and boot on samus, suspend/resume with various wake sources and ensure the reported _SWS values are correct in every case.

Original-Change-Id: Ic6897f20ad2f321f3566694c032b75a3db120556

ab1e96a broadwell: Fixes for _SWS support
src/soc/intel/broadwell/acpi/globalnvs.asl | 19 +++++++++----------
src/soc/intel/broadwell/include/soc/nvs.h | 21 ++++++++++-----------
src/soc/intel/broadwell/ramstage.c | 6 ++++--
3 files changed, 23 insertions(+), 23 deletions(-)

Upstream: review.coreboot.org

  • Share