cpu/amd: Add CC6 support

Hardware / Coreboot - Timothy Pearson [raptorengineeringinc.com] - 11 November 2015 11:45 UTC

This patch adds CC6 power save support to the AMD Family 15h support code. As CC6 is a complex power saving state that relies heavily on CPU, northbridge, and southbridge cooperation, this patch alters significant amounts of code throughout the tree simultaneously.

Allowing the CPU to enter CC6 allows the second level of turbo boost to be reached, and also provides significant power savings when the system is idle due to the complete core shutdown.

Change-Id: I44ce157cda97fb85f3e8f3d7262d4712b5410670

83abd81 cpu/amd: Add CC6 support
src/arch/x86/acpigen.c | 26 +++-
src/arch/x86/include/arch/acpigen.h | 3 +
src/cpu/amd/family_10h-family_15h/fidvid.c | 170 ++++++++++-----------
src/cpu/amd/family_10h-family_15h/init_cpus.c | 81 ++++++++++
src/cpu/amd/family_10h-family_15h/powernow_acpi.c | 135 ++++++++++++++--
src/include/cpu/amd/powernow.h | 2 +
src/mainboard/asus/kgpe-d16/cmos.default | 1 +
src/mainboard/asus/kgpe-d16/cmos.layout | 5 +-
src/northbridge/amd/amdfam10/link_control.c | 81 +++++++++-
src/northbridge/amd/amdfam10/northbridge.c | 58 ++++---
src/northbridge/amd/amdht/AsPsDefs.h | 3 +-
src/northbridge/amd/amdmct/amddefs.h | 66 ++++----
src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 57 ++++---
src/northbridge/amd/amdmct/mct_ddr3/mctecc_d.c | 8 +
src/southbridge/amd/sb700/early_setup.c | 19 ++-
src/southbridge/amd/sb700/fadt.c | 5 +
src/southbridge/amd/sb700/sb700.h | 7 +-
src/southbridge/amd/sb700/sm.c | 5 +-
src/southbridge/amd/sb800/fadt.c | 5 +
src/southbridge/amd/sb800/sb800.h | 8 +-
20 files changed, 544 insertions(+), 201 deletions(-)

Upstream: review.coreboot.org


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