fsp_baytrail: Add new microcode for Bay Trail M

Hardware / Coreboot - Werner Zeh [siemens.com] - 5 March 2015 05:45 UTC

Add a new microcode for Bay Trail M D0 stepping used in cpu N2807 silicon. In addition, a selection of the used CPU type has been added (I or M/D) which allows to use only the really needed microcode for a given CPU type.

Change-Id: I373fc9b535f1dc97eaa9f76ae46f0b69b247a8a0

b5a374d fsp_baytrail: Add new microcode for Bay Trail M
src/soc/intel/fsp_baytrail/Kconfig | 4 ++++
.../intel/fsp_baytrail/microcode/microcode_blob.c | 20 ++++++++++++--------
.../intel/fsp_baytrail/microcode/microcode_size.h | 6 +++++-
3 files changed, 21 insertions(+), 9 deletions(-)

Upstream: review.coreboot.org

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