ChromeEC is needed for EC controlled features to work properly. This patch adds neccessary support in soc/intel so that mainboard asl files can include the ChromeEC e.g. PNOT method and LPCB and also the nvs fields.
BUG = 53096 TEST = This patch is needed by the mainboard specific ASL change to include src/ec/google/chromeec/acpi/ec.asl
Change-Id: Icecc437df05cd3efb41579317a353fd22526e0c9
d6463dd intel/apollolake: Add support to enable google ChromeEC
src/soc/intel/apollolake/acpi/cpu.asl | 118 +++++++++++++++++++++++++
src/soc/intel/apollolake/acpi/globalnvs.asl | 7 +-
src/soc/intel/apollolake/acpi/lpc.asl | 23 +++++
src/soc/intel/apollolake/acpi/southbridge.asl | 3 +
src/soc/intel/apollolake/include/soc/nvs.h | 7 +-
5 files changed, 156 insertions(+), 2 deletions(-)
Upstream: review.coreboot.org