intel/i945/gma: Place GTT below top of memory

Hardware / Coreboot - Paul Menzel [users.sourceforge.net] - 20 August 2014 02:39 UTC

Since commit 17fec8a0 [1]

drm/i915: Use Graphics Base of Stolen Memory on all gen3+

present in the Linux kernel since version 3.12, 3D does not work anymore [2].

Comparing the graphics registers, in this case that means output of `intel_reg_dumper`, the vendor Video BIOS is setting the register PGTBL_CTL/PGETBL_CTL, only documented in the i965 datasheet [3], to `0x3ffc0001` on a system with 1 GB of RAM, while native graphics init sets it to `0x3f800001`.

Currently native graphis init sets the GTT right above the base address of stolen memory. The Video BIOS sets it below the top of memory. The Linux Intel driver expects it to be below top of memory, so do it this way, by setting the address to TOM minus the size of the GTT, which is hardcoded to 256 KiB.

As `PGETBL_CTL` is zero by default, reading its value in the beginning is not necessary and is only confusing. Make it clear that the code calculates the value.

There is still a PTE error reported during boot, but 3D works with Linux 3.12+ and no user visible problems are shown.

[1] https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=17fec8a08698bcab98788e1e89f5b8e7502ababd [2] https://bugs.freedesktop.org/show_bug.cgi?id=79038 [3] https://01.org/linuxgraphics/sites/default/files/documentation/965_g35_vol_1_graphics_core_0.pdf Intel ® 965 Express Chipset Family and Intel ® G35 Express Chipset Graphics Controller Programmer’s Reference Manual
Volume 1: Graphics Core Revision 1.0a

Change-Id: I0a5b04c2c5300f5056cb48075aa5804984bc9948

cc95f18 intel/i945/gma: Place GTT below top of memory
src/northbridge/intel/i945/gma.c | 16 ++++++++++++----
1 file changed, 12 insertions(+), 4 deletions(-)

Upstream: review.coreboot.org


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