Jetway NF81-T56N-LF [2/2]: actually implement mainboard support

Hardware / Coreboot - Edward O'Callaghan [alterapraxis.com] - 15 February 2014 21:51 UTC

Step 2: change the Persimmon code to adapt it to the new board's hardware.

The NF81-T56N-LF is a IPC form factor embedded board:- AMD Fusion G-T56N (1.65 GHz dual core) APU- 2x SO-DIMM sockets for DDR3 800-1066 SDRAM (Fixed at 1.5V)- VGA and LVDS (via Analogix ANX3110)- AMD A55E (Hudson-E1) southbridge- 6x USB 2.0/1.1 ports- 5x SATA3 6Gb/s, 1x mSATA socket- 6-Channel HD Audio (via VIA VT1705)- PCI and ISA (via ITE IT8888)??- NEC uPD78F0532 microcontroller on I2C ("SEMA")??- 2x RJ45 GbE (via Realtek RTL8111E x2)- Fintek F71869AD Super I/O- PS/2 KB/MS port- RS232 header (via Unisonic UTC 75232 RS232 driver/receiver)- GPIO header- CIR header- 1x MXIC MX25L1606E (SO8, soldered) 16 Mbit SPI flash (BIOS)

Note: MX25L1606E is 16Mbit, 8bits in a byte, so 2MB. Jetway *lies* claiming the SPI flash is 16MB. They also use red pen over the chip so you wont see this deceit.

Change-Id: I03ccc58bc782e800aeef0d19679ce060277b0c04

6e56de3 Jetway NF81-T56N-LF [2/2]: actually implement mainboard support.
src/mainboard/jetway/Kconfig | 3 +
src/mainboard/jetway/nf81-t56n-lf/Kconfig | 18 +++---
src/mainboard/jetway/nf81-t56n-lf/board_info.txt | 5 +-
src/mainboard/jetway/nf81-t56n-lf/devicetree.cb | 66 +++++++++++++++-------
src/mainboard/jetway/nf81-t56n-lf/platform_cfg.h | 3 +
src/mainboard/jetway/nf81-t56n-lf/romstage.c | 8 ++-
6 files changed, 69 insertions(+), 34 deletions(-)

Upstream: review.coreboot.org

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