Enable the SPI controllers on the Quark SoC.
Testing on Galileo:
- Edit the src/mainboard/intel/galileo/Makefile.inc file:
- Add "select ADD_FSP_PDAT_FILE"
- Add "select ADD_FSP_RAW_BIN"
- Add "select ADD_RMU_FILE"
- Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
- Place the pdat.bin files in the location specified by CONFIG_FSP_PDAT_FILE
- Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
- Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate UEFIPAYLOAD.fd
- Load the SPI driver stack
- Testing is successful when the time is able to be displayed on a set of seven-segment displays controlled by a Maxim MAX6950 SPI display controller.
Change-Id: Ic9c4575730c5a9a27cf9a38a41e82d8462467f3f
1f1f2c4 mainboard/intel/galileo: Enable SPI controllers
src/mainboard/intel/galileo/devicetree.cb | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
Upstream: review.coreboot.org