Remove sandybridge and ivybridge FSP code path

Hardware / Coreboot - Alexandru Gagniuc [gmail.com] - 3 October 2015 17:23 UTC

We already have two other code paths for this silicon. Maintaining the FSP path as well doesn't make much sense. There was only one board to use this code, and it's a reference board that I doubt anyone still owns or uses.

Change-Id: I4fcfa6c56448416624fd26418df19b354eb72f39

fb50124 Remove sandybridge and ivybridge FSP code path
src/cpu/intel/Kconfig | 1 -
src/cpu/intel/Makefile.inc | 2 -
src/cpu/intel/fsp_model_206ax/Kconfig | 62 --
src/cpu/intel/fsp_model_206ax/Makefile.inc | 11 -
src/cpu/intel/fsp_model_206ax/acpi.c | 345 --------
src/cpu/intel/fsp_model_206ax/acpi/cpu.asl | 101 ---
src/cpu/intel/fsp_model_206ax/bootblock.c | 31 -
src/cpu/intel/fsp_model_206ax/chip.h | 35 -
src/cpu/intel/fsp_model_206ax/finalize.c | 81 --
src/cpu/intel/fsp_model_206ax/model_206ax.h | 113 ---
src/cpu/intel/fsp_model_206ax/model_206ax_init.c | 437 ---------
src/mainboard/intel/cougar_canyon2/Kconfig | 62 --
src/mainboard/intel/cougar_canyon2/Kconfig.name | 2 -
.../cougar_canyon2/acpi/hostbridge_pci_irqs.asl | 99 ---
.../intel/cougar_canyon2/acpi/mainboard.asl | 27 -
.../intel/cougar_canyon2/acpi/platform.asl | 47 -
.../intel/cougar_canyon2/acpi/superio.asl | 35 -
src/mainboard/intel/cougar_canyon2/acpi_tables.c | 84 --
src/mainboard/intel/cougar_canyon2/board_info.txt | 2 -
src/mainboard/intel/cougar_canyon2/cmos.layout | 118 ---
src/mainboard/intel/cougar_canyon2/devicetree.cb | 70 --
src/mainboard/intel/cougar_canyon2/dsdt.asl | 53 --
src/mainboard/intel/cougar_canyon2/gpio.h | 308 -------
src/mainboard/intel/cougar_canyon2/hda_verb.c | 43 -
src/mainboard/intel/cougar_canyon2/mainboard.c | 56 --
src/mainboard/intel/cougar_canyon2/mainboard_smi.c | 75 --
src/mainboard/intel/cougar_canyon2/romstage.c | 323 -------
src/mainboard/intel/cougar_canyon2/thermal.h | 57 --
src/northbridge/intel/fsp_sandybridge/Kconfig | 46 -
src/northbridge/intel/fsp_sandybridge/Makefile.inc | 41 -
src/northbridge/intel/fsp_sandybridge/acpi.c | 212 -----
.../intel/fsp_sandybridge/acpi/hostbridge.asl | 359 --------
src/northbridge/intel/fsp_sandybridge/acpi/igd.asl | 78 --
.../intel/fsp_sandybridge/acpi/sandybridge.asl | 58 --
src/northbridge/intel/fsp_sandybridge/chip.h | 45 -
src/northbridge/intel/fsp_sandybridge/early_init.c | 88 --
src/northbridge/intel/fsp_sandybridge/finalize.c | 56 --
src/northbridge/intel/fsp_sandybridge/fsp/Kconfig | 40 -
.../intel/fsp_sandybridge/fsp/Makefile.inc | 21 -
.../intel/fsp_sandybridge/fsp/chipset_fsp_util.c | 113 ---
.../intel/fsp_sandybridge/fsp/chipset_fsp_util.h | 68 --
src/northbridge/intel/fsp_sandybridge/gma.c | 110 ---
src/northbridge/intel/fsp_sandybridge/gma.h | 167 ----
.../intel/fsp_sandybridge/northbridge.c | 407 ---------
.../intel/fsp_sandybridge/northbridge.h | 231 -----
.../intel/fsp_sandybridge/northbridge_pci_devs.h | 47 -
src/northbridge/intel/fsp_sandybridge/ram_calc.c | 38 -
src/northbridge/intel/fsp_sandybridge/raminit.c | 76 --
src/northbridge/intel/fsp_sandybridge/raminit.h | 25 -
.../intel/fsp_sandybridge/report_platform.c | 114 ---
src/northbridge/intel/fsp_sandybridge/udelay.c | 55 --
src/southbridge/intel/fsp_bd82x6x/Kconfig | 57 --
src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 51 --
src/southbridge/intel/fsp_bd82x6x/acpi/audio.asl | 34 -
.../intel/fsp_bd82x6x/acpi/globalnvs.asl | 286 ------
.../intel/fsp_bd82x6x/acpi/irqlinks.asl | 491 -----------
src/southbridge/intel/fsp_bd82x6x/acpi/lpc.asl | 223 -----
src/southbridge/intel/fsp_bd82x6x/acpi/pch.asl | 274 ------
src/southbridge/intel/fsp_bd82x6x/acpi/pcie.asl | 217 -----
.../intel/fsp_bd82x6x/acpi/pcie_port.asl | 29 -
src/southbridge/intel/fsp_bd82x6x/acpi/sata.asl | 81 --
.../intel/fsp_bd82x6x/acpi/sleepstates.asl | 30 -
src/southbridge/intel/fsp_bd82x6x/acpi/smbus.asl | 240 -----
src/southbridge/intel/fsp_bd82x6x/acpi/usb.asl | 89 --
src/southbridge/intel/fsp_bd82x6x/azalia.c | 371 --------
src/southbridge/intel/fsp_bd82x6x/bootblock.c | 98 ---
src/southbridge/intel/fsp_bd82x6x/chip.h | 95 --
src/southbridge/intel/fsp_bd82x6x/early_init.c | 190 ----
src/southbridge/intel/fsp_bd82x6x/early_me.c | 199 -----
src/southbridge/intel/fsp_bd82x6x/early_smbus.c | 215 -----
src/southbridge/intel/fsp_bd82x6x/early_spi.c | 114 ---
src/southbridge/intel/fsp_bd82x6x/early_usb.c | 56 --
src/southbridge/intel/fsp_bd82x6x/elog.c | 114 ---
src/southbridge/intel/fsp_bd82x6x/finalize.c | 64 --
src/southbridge/intel/fsp_bd82x6x/gpio.c | 135 ---
src/southbridge/intel/fsp_bd82x6x/gpio.h | 194 ----
src/southbridge/intel/fsp_bd82x6x/lpc.c | 784 -----------------
src/southbridge/intel/fsp_bd82x6x/me.c | 773 ----------------
src/southbridge/intel/fsp_bd82x6x/me.h | 372 --------
src/southbridge/intel/fsp_bd82x6x/me_8.x.c | 928 --------------------
src/southbridge/intel/fsp_bd82x6x/me_status.c | 212 -----
src/southbridge/intel/fsp_bd82x6x/nvs.h | 159 ----
src/southbridge/intel/fsp_bd82x6x/pch.c | 410 ---------
src/southbridge/intel/fsp_bd82x6x/pch.h | 589 -------------
src/southbridge/intel/fsp_bd82x6x/reset.c | 33 -
src/southbridge/intel/fsp_bd82x6x/sata.c | 122 ---
src/southbridge/intel/fsp_bd82x6x/smi.c | 351 --------
src/southbridge/intel/fsp_bd82x6x/smihandler.c | 760 ----------------
.../intel/fsp_bd82x6x/southbridge_pci_devs.h | 127 ---
src/southbridge/intel/fsp_bd82x6x/watchdog.c | 59 --
src/vendorcode/intel/Kconfig | 1 -
util/board_status/to-wiki/towiki.sh | 2 +-
92 files changed, 1 insertion(+), 14803 deletions(-)

Upstream: review.coreboot.org

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