When using single-channel ddr, DMC channel 1 need to reset dll, otherwise it will lead to pmdomain idle request fails.
BUG=chrome-os-partner:35654 BRANCH=veyron TEST=boot rialto
Change-Id: Id6b673187c688d238e9a391b3d98720c783e3af4
8cc3a2a rk3288: support single channel ddr
src/soc/rockchip/rk3288/sdram.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
Upstream: review.coreboot.org