skylake: gpio: Add support for setting 1.8V tolerant

Hardware / Coreboot - Duncan Laurie [chromium.org] - 9 June 2016 10:07 UTC

Add the voltage tolerance GPIO attribute for configuring I2C/I2S buses that are at 1.8V. This is currently done by passing in a value to FSP but it is needed earlier than FSP if the I2C bus is used in verstage.

This does not remove the need for the FSP input parameter, that is still required so FSP doesn't disable what has been set in coreboot. The mainboards that are affected are updated in this commit.

This was tested by exercising I2C transactions to the 1.8V codec while in verstage on the google/chell mainboard.

7f3156d skylake: gpio: Add support for setting 1.8V tolerant
src/mainboard/google/chell/gpio.h | 4 ++--
src/mainboard/google/glados/gpio.h | 4 ++--
src/mainboard/google/lars/gpio.h | 4 ++--
src/mainboard/intel/kunimitsu/gpio.h | 4 ++--
src/soc/intel/skylake/gpio.c | 19 ++++++++++++-------
src/soc/intel/skylake/include/soc/gpio.h | 14 ++++++++++----
src/soc/intel/skylake/include/soc/gpio_defs.h | 5 +++++
7 files changed, 35 insertions(+), 19 deletions(-)

Upstream: review.coreboot.org

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