skylake/devicetree: Add PIRQ Routing programming

Hardware / Coreboot - Barnali Sarkar [intel.com] - 8 August 2016 11:24 UTC

Program PIRQ Routing with correct values, as done by FSP, and also in 'soc/intel/skylake/romstage/pch.c' file. If not done, these values get overridden by "0" during PxRC -> PIRQ programming in ramstage, in 'soc/intel/skylake/lpc.c' file pch_pirq_init()function.

BUG=none BRANCH=none TEST=Build and boot kunimitsu

Change-Id: Ibeb9a64824a71c253e45d6a1c6088abd737cf046

8f2f22d skylake/devicetree: Add PIRQ Routing programming
src/mainboard/google/chell/devicetree.cb | 9 +++++++++
src/mainboard/google/glados/devicetree.cb | 9 +++++++++
src/mainboard/google/lars/devicetree.cb | 9 +++++++++
src/mainboard/intel/kunimitsu/devicetree.cb | 9 +++++++++
src/soc/intel/skylake/chip.h | 1 +
5 files changed, 37 insertions(+)

Upstream: review.coreboot.org

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