Skip FSP initiated core/MP init as it is implemented and initiated in coreboot.
Add soc core init to set up the following feature MSRs: 1. C-states 2. IO/Mwait redirection
BUG=chrome-os-partner:56922 BRANCH=None
TEST= Check C-state functioning using 'powertop'. Check 0xE2 and 0xE4 MSR to verify IO/Mwait redirection.
a52f883 soc/apollolake: Add soc core init
src/soc/intel/apollolake/chip.c | 1 +
src/soc/intel/apollolake/cpu.c | 23 ++++++++++++++++++++++-
src/soc/intel/apollolake/include/soc/cpu.h | 13 +++++++++++++
src/soc/intel/apollolake/include/soc/iomap.h | 7 ++++++-
4 files changed, 42 insertions(+), 2 deletions(-)
Upstream: review.coreboot.org