soc/intel/apollolake: Enable LPC bus interface

Hardware / Coreboot - Andrey Petrov [intel.com] - 27 April 2016 22:38 UTC

This adds early LPC setup in bootblock (for Chrome EC) as well as late (ramstage) IO decode/sirq enable.

Change-Id: Ic270e66dbf07240229d4783f80e2ec02007c36c2

e976bd4 soc/intel/apollolake: Enable LPC bus interface
src/soc/intel/apollolake/bootblock/bootblock.c | 29 +++++++++++++++
src/soc/intel/apollolake/chip.h | 9 +++++
src/soc/intel/apollolake/include/soc/lpc.h | 40 +++++++++++++++++++++
src/soc/intel/apollolake/include/soc/pci_devs.h | 3 ++
src/soc/intel/apollolake/lpc.c | 43 ++++++++++++++++++++++-
5 files changed, 123 insertions(+), 1 deletion(-)

Upstream: review.coreboot.org

  • Share