southbridge/amd/pi: Enable early I/O decode to LPC

Hardware / Coreboot - Dave Frodin [se-eng.com] - 17 March 2015 11:49 UTC

The decode of UART addresses down to the LPC bus needs to occur early to allow romstage console messages to be seen. This enables the decode of most of the I/O ports typically seen in a system.

Change-Id: I6636946af4ad5320a5a46c2920b4f06345b5f806

f364fc7 southbridge/amd/pi: Enable early I/O decode to LPC
src/southbridge/amd/pi/hudson/early_setup.c | 24 ++++++++++++++++++
src/southbridge/amd/pi/hudson/hudson.h | 35 +++++++++++++++++++++++++++
2 files changed, 59 insertions(+)

Upstream: review.coreboot.org

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