Add SSTL 1.8 V Interface Level as specified in JEDEC_DDR2_SPD_Specification_ Rev1.3, page 10.
Change-Id: I0112a85f557826b629109e212dbbc752aeda305d
46bfce3 spd: Add module voltage for 1.8V
src/include/spd.h | 1 +
1 file changed, 1 insertion(+)
Upstream: review.coreboot.org