arm: Redesign, clarify and clean up cache related code

Hardware / Coreboot - Julius Werner [chromium.org] - 10 November 2014 14:34 UTC

This patch changes several cache-related pieces to be cleaner, faster or more correct. The largest point is removing the old arm_invalidate_caches() function and surrounding bootblock code to initialize SCTLR and replace it with an all-assembly function that takes care of cache and SCTLR initialization to bring the system to a known state. It runs without stack and before coreboot makes any write accesses to be as compatible as possible with whatever state the system was left in by preceeding code. This also finally fixes the dreaded icache bug that wasted hundreds of milliseconds during boot.

Old-Change-Id: I7bb4995af8184f6383f8e3b1b870b0662bde8bd4

fd9defc arm: Redesign, clarify and clean up cache related code
payloads/libpayload/arch/arm/cache.c | 78 ++++---------------------
payloads/libpayload/include/arm/arch/cache.h | 19 +------
payloads/libpayload/include/x86/arch/cache.h | 2 +-
src/arch/arm/armv4/cache.c | 7 +--
src/arch/arm/armv7/bootblock.S | 2 +
src/arch/arm/armv7/bootblock_simple.c | 17 ------
src/arch/arm/armv7/cache.c | 79 ++++----------------------
src/arch/arm/armv7/cpu.S | 31 ++++++++++
src/arch/arm/armv7/mmu.c | 13 ++++-
src/arch/arm/include/armv4/arch/cache.h | 7 +--
src/arch/arm/include/armv7/arch/cache.h | 19 +------
src/arch/arm/stages.c | 18 ++----
src/mainboard/google/daisy/mainboard.c | 1 -
src/mainboard/google/nyan/romstage.c | 23 +++-----
src/mainboard/google/nyan_big/romstage.c | 23 +++-----
src/mainboard/google/peach_pit/mainboard.c | 1 -
src/soc/samsung/exynos5420/wakeup.c | 1 -
17 files changed, 94 insertions(+), 247 deletions(-)

Upstream: review.coreboot.org

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