baytrail: Switch from ACPI mode to PCI mode for legacy support

Hardware / Coreboot - Marc Jones [se-eng.com] - 10 April 2015 12:21 UTC

Most Baytrail based devices MMIO registers are reported in ACPI space and the device's PCI config space is disabled. The PCI config space is required for many "legacy" OSs that don't have the ACPI driver loading mechanism. Depthcharge signals the legacy boot path via the SMI 0xCC and the coreboot SMI handler can switch the device specific registers to re-enable PCI config space.

BUG=chrome-os-partner:30836 BRANCH=None TEST=Build and boot Rambi SeaBIOS.

Change-Id: I87248936e2a7e026f38c147bdf0df378e605e370

9afc5c0 baytrail: Switch from ACPI mode to PCI mode for legacy support
src/include/cpu/x86/smm.h | 1 +
src/soc/intel/baytrail/Makefile.inc | 1 +
src/soc/intel/baytrail/smihandler.c | 59 +++++++++++++++++++++++++++++++++++
3 files changed, 61 insertions(+)

Upstream: review.coreboot.org

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