fsp1_1: provide binding to UEFI version

Hardware / Coreboot - Aaron Durbin [chromium.org] - 10 September 2015 12:52 UTC

FSP has some unique attributes which makes integration cumbersome:

1. FSP header files do not include the types they need. Like EDKII development it's expected types are provided by the build system. Therefore, one needs to include the proper files to avoid compilation issues. 2. An implementation of FSP for a chipset may use different
versions of the UEFI PI spec implementation. EDKII is a proxy for all of UEFI specifications. In order to provide flexibility one needs to binding a set of types and structures from an UEFI PI implementation. 3. Each chipset FSP 1.1 implementation has a FspUpdVpd.h file which defines it's own types. Commonality between FSP chipset implementations are only named typedef structs. The fields within are not consistent. And because of FSP's insistence on typedefs it makes it near impossible to forward declare structs.

The above 3 means one needs to include the correct UEFI type bindings when working with FSP. The current implementation had the SoC picking include paths in the edk2 directory and using a bare include. Also, with the prior fsp_util.h implementation the SoC's FSP FspUpdVpd.h header file was required since for providing all the types at once (Generic FSP 1.1 and SoC types).

The binding has been changed in the following manner: 1. CONFIG_UEFI_2_4_BINDING option added which FSP 1.1 selects. No other bindings are currently available, but this provides the policy. 2. Based on CONFIG_UEFI_2_4_BINDING the proper include paths are added to the CPPFLAGS_common. 3. SoC Makefile.inc does not bind UEFI types nor does it adjust CPPFLAGS_common in any way. 4. Provide a include/fsp directory under fsp1_1 and expose src/drivers/intel/fsp1_1/include in the include path. This split can allow a version 2, for example, FSP to provide its own include files. Yes, that means there needs to be consistency in APIs, however that's not this patch. 5. Provide a way for code to differentiate the FSP spec types (fsp/api.h) from the chipset FSP types (fsp/soc_binding.h). This allows for code re-use that doesn't need the chipset types to be defined such as the FSP relocation code.

BUG=chrome-os-partner:44827 BRANCH=None TEST=Built and booted on glados.

789f2b6 fsp1_1: provide binding to UEFI version
src/drivers/intel/fsp1_1/Kconfig | 1 +
src/drivers/intel/fsp1_1/Makefile.inc | 4 +-
src/drivers/intel/fsp1_1/fsp_gop.c | 2 +-
src/drivers/intel/fsp1_1/fsp_gop.h | 33 -------
src/drivers/intel/fsp1_1/fsp_relocate.c | 3 +-
src/drivers/intel/fsp1_1/fsp_util.c | 2 +-
src/drivers/intel/fsp1_1/fsp_util.h | 104 --------------------
src/drivers/intel/fsp1_1/hob.c | 2 +-
src/drivers/intel/fsp1_1/include/fsp/api.h | 41 ++++++++
src/drivers/intel/fsp1_1/include/fsp/gop.h | 33 +++++++
src/drivers/intel/fsp1_1/include/fsp/soc_binding.h | 43 ++++++++
.../intel/fsp1_1/include/fsp/uefi_binding.h | 39 ++++++++
src/drivers/intel/fsp1_1/include/fsp/util.h | 96 ++++++++++++++++++
src/soc/intel/braswell/Makefile.inc | 8 --
src/soc/intel/braswell/acpi.c | 2 +-
src/soc/intel/braswell/chip.c | 2 +-
src/soc/intel/braswell/chip.h | 2 +-
.../intel/braswell/include/soc/chipset_fsp_util.h | 41 --------
src/soc/intel/braswell/include/soc/romstage.h | 2 +-
src/soc/intel/braswell/northcluster.c | 2 +-
src/soc/intel/braswell/ramstage.c | 2 +-
src/soc/intel/braswell/romstage/romstage.c | 2 +-
src/soc/intel/common/fsp_ramstage.c | 2 +-
src/soc/intel/common/raminit.c | 2 +-
src/soc/intel/common/ramstage.h | 2 +-
src/soc/intel/common/romstage.h | 2 +-
src/soc/intel/common/vbt.c | 2 +-
src/soc/intel/skylake/Makefile.inc | 9 +-
src/soc/intel/skylake/chip.c | 2 +-
.../intel/skylake/include/soc/chipset_fsp_util.h | 41 --------
src/soc/intel/skylake/ramstage.c | 3 -
src/vendorcode/intel/Kconfig | 3 +
src/vendorcode/intel/Makefile.inc | 10 ++
src/vendorcode/intel/edk2/uefi_2.4/uefi_types.h | 18 ++--
34 files changed, 296 insertions(+), 266 deletions(-)

Upstream: review.coreboot.org

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