intel/skylake: Add support to enable wake-on-usb attach/detach

Hardware / Coreboot - Furquan Shaikh [chromium.org] - 26 October 2016 01:33 UTC

Three things are required to enable wake-on-usb: 1. 5V to USB ports should be enabled in S3. 2. ASL file needs to have appropriate wake bit set. 3. XHCI controller should have the wake on attach/detach bit set for the corresponding port in PORTSCN register.

Only part missing was #3.

This CL adds support to allow mainboard to define a bitmap in devicetree corresponding to the ports that it wants to enable wake-on-usb feature. Based on the bitmap, wake on attach/detach bits in PORTSCN would be set by xhci.asl for the appropriate ports.

BUG=chrome-os-partner:58734 BRANCH=None TEST=Verified that with port 5 enabled, chell wakes up from S3 on usb attach/detach.

Change-Id: I40a22a450e52f74a0ab93ebb8170555d834ebdaf

3bfe340 intel/skylake: Add support to enable wake-on-usb attach/detach
src/soc/intel/skylake/acpi.c | 4 +++
src/soc/intel/skylake/acpi/globalnvs.asl | 2 ++
src/soc/intel/skylake/acpi/xhci.asl | 51 ++++++++++++++++++++++++++++++
src/soc/intel/skylake/chip.h | 6 ++++
src/soc/intel/skylake/include/soc/nvs.h | 4 ++-
src/soc/intel/skylake/include/soc/usb.h | 7 ++++
6 files changed, 73 insertions(+), 1 deletion(-)

Upstream: review.coreboot.org

  • Share