sb/amd/sp5100: Add ehci_async_data_cache CMOS option

Hardware / Coreboot - Timothy Pearson [raptorengineeringinc.com] - 5 April 2016 15:37 UTC

SP5100 devices are affected by an erratum that can lock up the EHCI ports under certain conditions. Add an optional CMOS option to enable a workaround at the expense of performance.

Change-Id: I305d23dfa50f10a3dcb5c731e8923305c8956dde

9ef6717 sb/amd/sp5100: Add ehci_async_data_cache CMOS option
src/southbridge/amd/sb700/usb.c | 17 +++++++++++++++--
1 file changed, 15 insertions(+), 2 deletions(-)

Upstream: review.coreboot.org

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